參數(shù)資料
型號(hào): PIC18LF6520T-I/PTG
廠商: Microchip Technology
文件頁數(shù): 161/165頁
文件大小: 0K
描述: IC MCU FLASH 16KX16 64TQFP
標(biāo)準(zhǔn)包裝: 1,200
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 52
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 帶卷 (TR)
其它名稱: PIC18LF6520T-IPTG
2004 Microchip Technology Inc.
DS39609B-page 93
PIC18F6520/8520/6620/8620/6720/8720
REGISTER 9-5:
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
U-0
R/W-0
U-0
R/W-0
—CMIF
EEIF
BCLIF
LVDIF
TMR3IF
CCP2IF
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6
CMIF: Comparator Interrupt Flag bit
1
= The comparator input has changed (must be cleared in software)
0
= The comparator input has not changed
bit 5
Unimplemented: Read as ‘0’
bit 4
EEIF: Data EEPROM/Flash Write Operation Interrupt Flag bit
1
= The write operation is complete (must be cleared in software)
0
= The write operation is not complete, or has not been started
bit 3
BCLIF: Bus Collision Interrupt Flag bit
1
= A bus collision occurred while the SSP module (configured in I2C Master mode)
was transmitting (must be cleared in software)
0
= No bus collision occurred
bit 2
LVDIF: Low-Voltage Detect Interrupt Flag bit
1
= A low-voltage condition occurred (must be cleared in software)
0
= The device voltage is above the Low-Voltage Detect trip point
bit 1
TMR3IF: TMR3 Overflow Interrupt Flag bit
1
= TMR3 register overflowed (must be cleared in software)
0
= TMR3 register did not overflow
bit 0
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1
= A TMR1 or TMR3 register capture occurred (must be cleared in software)
0
= No TMR1 or TMR3 register capture occurred
Compare mode:
1
= A TMR1 or TMR3 register compare match occurred (must be cleared in software)
0
= No TMR1 or TMR3 register compare match occurred
PWM mode:
Unused in this mode.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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