參數(shù)資料
型號： PIC18F86J11-I/PT
廠商： Microchip Technology
文件頁數(shù)： 99/107頁
文件大小： 0K
描述： IC PIC MCU FLASH 32KX16 80TQFP
產(chǎn)品培訓模塊： Asynchronous Stimulus
PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
標準包裝： 119
系列： PIC® 18F
核心處理器： PIC
芯體尺寸： 8-位
速度： 48MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復位，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 68
程序存儲器容量： 64KB（32K x 16）
程序存儲器類型： 閃存
RAM 容量： 3930 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 15x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-TQFP
包裝： 托盤
產(chǎn)品目錄頁面： 644 (CN2011-ZH PDF)
配用： AC162091-ND - HEADER MPLAB ICD2 18F87J11 64/80
MA180020-ND - MODULE PLUG-IN HPC EXPL 18F87J11
AC164328-ND - MODULE SKT FOR 80TQFP
2007-2012 Microchip Technology Inc.
DS39778E-page 91
PIC18F87J11 FAMILY
6.5
Program Memory and the
Extended Instruction Set
The operation of program memory is unaffected by the
use of the extended instruction set.
Enabling the extended instruction set adds five
additional two-word commands to the existing PIC18
instruction set: ADDFSR, CALLW, MOVSF, MOVSS and
SUBFSR
. These instructions are executed as described
6.6
Data Memory and the Extended
Instruction Set
Enabling the PIC18 extended instruction set (XINST
Configuration bit = 1) significantly changes certain
aspects of data memory and its addressing. Specifi-
cally, the use of the Access Bank for many of the core
PIC18 instructions is different. This is due to the intro-
duction of a new addressing mode for the data memory
space. This mode also alters the behavior of Indirect
Addressing using FSR2 and its associated operands.
What does not change is just as important. The size of
the data memory space is unchanged, as well as its
linear addressing. The SFR map remains the same.
Core PIC18 instructions can still operate in both Direct
and Indirect Addressing mode; inherent and literal
instructions do not change at all. Indirect Addressing
with FSR0 and FSR1 also remains unchanged.
6.6.1
INDEXED ADDRESSING WITH
LITERAL OFFSET
Enabling the PIC18 extended instruction set changes
the behavior of Indirect Addressing using the FSR2
register pair and its associated file operands. Under the
proper conditions, instructions that use the Access
Bank, which are most of the bit-oriented and
byte-oriented instructions, can invoke a form of
Indexed Addressing using an offset specified in the
instruction. This special addressing mode is known as
Indexed Addressing with Literal Offset, or Indexed
Literal Offset mode.
When using the extended instruction set, this
addressing mode requires the following:
The use of the Access Bank is forced (‘a(chǎn)’ = 0)
The file address argument is less than or equal to
5Fh
Under these conditions, the file address of the
instruction is not interpreted as the lower byte of an
address (used with the BSR in Direct Addressing) or as
an 8-bit address in the Access Bank. Instead, the value
is interpreted as an offset value to an Address Pointer
specified by FSR2. The offset and the contents of
FSR2 are added to obtain the target address of the
operation.
6.6.2
INSTRUCTIONS AFFECTED BY
INDEXED LITERAL OFFSET MODE
Any of the core PIC18 instructions that can use Direct
Addressing are potentially affected by the Indexed
Literal Offset Addressing mode. This includes all
byte-oriented and bit-oriented instructions, or almost
one-half of the standard PIC18 instruction set. Instruc-
tions that only use Inherent or Literal Addressing
modes are unaffected.
Additionally, byte-oriented and bit-oriented instructions
are not affected if they do not use the Access Bank
(Access RAM bit is ‘1’) or include a file address of 60h
or above. Instructions meeting these criteria will con-
tinue to execute as before. A comparison of the differ-
ent possible addressing modes when the extended
instruction set is enabled is shown in Figure 6-10.
Those who desire to use byte-oriented or bit-oriented
instructions in the Indexed Literal Offset mode should
note the changes to assembler syntax for this mode.
This is described in more detail in Section 26.2.1
相關(guān)PDF資料
PDF描述
PIC18F66J50-I/PT IC PIC MCU FLASH 32KX16 64TQFP
PIC24FJ96GA006-I/PT IC PIC MCU FLASH 96KB 64TQFP
PIC18F4321-I/ML IC PIC MCU FLASH 4KX16 44QFN
PIC24FJ32GB002-I/SP IC MCU 16BIT 32KB FLASH 28DIP
DSPIC33FJ16GP304-I/PT IC DSPIC MCU/DSP 16K 44TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC18F86J11T-I/PT 功能描述:8位微控制器 -MCU 64KB Flash 3936bytes RAM 67 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC18F86J15-I/PT 功能描述:8位微控制器 -MCU 96 KB FL 4 KB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC18F86J15T-I/PT 功能描述:8位微控制器 -MCU 96 KB FL 4 KB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC18F86J16-I/PT 功能描述:8位微控制器 -MCU 96KB FL 3936b RAM 10 MIPS 67 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC18F86J16T-I/PT 功能描述:8位微控制器 -MCU 96KB Flash 3936bytes RAM 67 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*