
2010-2012 Microchip Technology Inc.
DS39977F-page 261
PIC18F66K80 FAMILY
TABLE 19-3:
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1/3
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
RCON
IPEN
SBOREN
CM
RI
TO
PD
POR
BOR
PIR3
—
RC2IF
TX2IF
CTMUIF
CCP2IF
CCP1IF
—
PIE3
—
RC2IE
TX2IE
CTMUIE
CCP2IE
CCP1IE
—
IPR3
—
RC2IP
TX2IP
CTMUIP
CCP2IP
CCP1IP
—
PIR4
TMR4IF
EEIF
CMP2IF
CMP1IF
—
CCP5IF
CCP4IF
CCP3IF
PIE4
TMR4IE
EEIE
CMP2IE
CMP1IE
—
CCP5IE
CCP4IE
CCP3IE
IPR4
TMR4IP
EEIP
CMP2IP
CMP1IP
—
CCP5IP
CCP4IP
CCP3IP
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
TMR1L
Timer1 Register Low Byte
TMR1H
Timer1 Register High Byte
TMR3L
Timer3 Register Low Byte
TMR3H
Timer3 Register High Byte
T1CON
TMR1CS1 TMR1CS0 T1CKPS1
T1CKPS0
SOSCEN
T1SYNC
RD16
TMR1ON
T3CON
TMR3CS1 TMR3CS0 T3CKPS1
T3CKPS0
SOSCEN
T3SYNC
RD16
TMR3ON
CCPR2L
Capture/Compare/PWM Register 2 Low Byte
CCPR2H
Capture/Compare/PWM Register 2 High Byte
CCPR3L
Capture/Compare/PWM Register 3 Low Byte
CCPR3H
Capture/Compare/PWM Register 3 High Byte
CCPR4L
Capture/Compare/PWM Register 4 Low Byte
CCPR4H
Capture/Compare/PWM Register 4 High Byte
CCPR5L
Capture/Compare/PWM Register 5 Low Byte
CCPR5H
Capture/Compare/PWM Register 5 High Byte
CCP2CON
—
DC2B1
DC2B0
CCP2M3
CCP2M2
CCP2M1
CCP2M0
CCP3CON
—
DC3B1
DC3B0
CCP3M3
CCP3M2
CCP3M1
CCP3M0
CCP4CON
—
DC4B1
DC4B0
CCP4M3
CCP4M2
CCP4M1
CCP4M0
CCP5CON
—
DC5B1
DC5B0
CCP5M3
CCP5M2
CCP5M1
CCP5M0
CCPTMRS
—
C5TSEL
C4TSEL
C3TSEL
C2TSEL
C1TSEL
PMD0
CCP5MD
CCP4MD
CCP3MD
CCP2MD
CCP1MD
UART2MD UART1MD
SSPMD
Legend:
— = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare or Timer1/3.