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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC18F4585-I/PT
寤犲晢锛� Microchip Technology
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鏍稿績铏曠悊鍣細 PIC
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绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
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RAM 瀹归噺锛� 3.25K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.2 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞夋彌鍣細 A/D 11x10b
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AC164305-ND - MODULE SKT FOR PM3 44TQFP
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AC164020-ND - MODULE SKT PROMATEII 44TQFP
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2002 Microchip Technology Inc.
Preliminary
DS30485A-page 263
PIC18FXX39
Module Differential Current
D022
IWDT
Watchdog Timer
PIC18LFXX39
鈥�
0.75
2
10
1.5
8
25
A
VDD = 2.0V, +25
掳C
VDD = 2.0V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +85掳C
D022
Watchdog Timer
PIC18FXX39
鈥�
7
10
25
15
25
40
A
VDD = 4.2V, +25
掳C
VDD = 4.2V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +125掳C
D022A
IBOR
Brown-out Reset(4)
PIC18LFXX39
鈥�
29
33
35
45
50
A
VDD = 2.0V, +25
掳C
VDD = 2.0V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +85掳C
D022A
Brown-out Reset(4)
PIC18FXX39
鈥�
36
40
50
65
A
VDD = 4.2V, +25
掳C
VDD = 4.2V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +125掳C
D022B
ILVD
Low Voltage Detect(4)
PIC18LFXX39
鈥�
29
33
35
45
50
A
VDD = 2.0V, +25
掳C
VDD = 2.0V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +85掳C
D022B
Low Voltage Detect(4)
PIC18FXX39
鈥�
33
40
50
65
A
VDD = 4.2V, +25
掳C
VDD = 4.2V, -40
掳C to +85掳C
VDD = 4.2V, -40
掳C to +125掳C
23.1
DC Characteristics: PIC18FXX39 (Industrial, Extended)
PIC18LFXX39 (Industrial) (Continued)
PIC18LFXX39
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
PIC18FXX39
(Industrial, Extended)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40掳C
鈮� TA 鈮� +85掳C for industrial
-40掳C
鈮� TA 鈮� +125掳C for extended
Param
No.
Symbol
Characteristic
Min
Typ
Max Units
Conditions
Legend: Shading of rows is to assist in readability of the table.
Note 1: This is the limit to which VDD can be lowered in SLEEP mode, or during a device RESET, without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an
impact on the current consumption.
The test conditions for all IDD measurements in active Operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD
MCLR = VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS, and all
features that add delta current disabled (such as WDT, Timer1 Oscillator, BOR, etc.).
4: The LVD and BOR modules share a large portion of circuitry. The
IBOR and ILVD currents are not additive.
Once one of these modules is enabled, the other may also be enabled without further penalty.
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