[ label ] INCFSZ f [,d [,a] Opera" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC18F4539T-I/ML
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 152/322闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU FLASH 12KX16 EE A/D 44QFN
妯欐簴鍖呰锛� 1,600
绯诲垪锛� PIC® 18F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 40MHz
閫i€氭€э細 I²C锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯/寰╀綅锛孡VD锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 32
绋嬪簭瀛樺劜鍣ㄥ閲忥細 24KB锛�12K x 16锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶�?銆�?/td> 256 x 8
RAM 瀹归噺锛� 1408 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.2 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 8x10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 44-VQFN 瑁搁湶鐒婄洡
鍖呰锛� 甯跺嵎 (TR)
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2002 Microchip Technology Inc.
Preliminary
DS30485A-page 233
PIC18FXX39
INCFSZ
Increment f, skip if 0
Syntax:
[ label ] INCFSZ f [,d [,a]
Operands:
0
鈮� f 鈮� 255
d
鈭� [0,1]
a
鈭� [0,1]
Operation:
(f) + 1
鈫� dest,
skip if result = 0
Status Affected:
None
Encoding:
0011
11da
ffff
Description:
The contents of register 'f' are
incremented. If 'd' is 0, the result is
placed in W. If 'd' is 1, the result is
placed back in register 'f'. (default)
If the result is 0, the next instruc-
tion, which is already fetched, is
discarded, and a NOP is executed
instead, making it a two-cycle
instruction. If 鈥榓(ch菐n)鈥� is 0, the Access
Bank will be selected, overriding
the BSR value. If 鈥榓(ch菐n)鈥� = 1, then the
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
Write to
destination
If skip:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Example:
HERE
INCFSZ
CNT, 1, 0
NZERO
:
ZERO
:
Before Instruction
PC
=
Address (HERE)
After Instruction
CNT
=
CNT + 1
If CNT
=
0;
PC
=
Address (ZERO)
If CNT
鈮�
0;
PC
=
Address (NZERO)
INFSNZ
Increment f, skip if not 0
Syntax:
[ label ] INFSNZ f [,d [,a]
Operands:
0
鈮� f 鈮� 255
d
鈭� [0,1]
a
鈭� [0,1]
Operation:
(f) + 1
鈫� dest,
skip if result
鈮� 0
Status Affected:
None
Encoding:
0100
10da
ffff
Description:
The contents of register 'f' are
incremented. If 'd' is 0, the result is
placed in W. If 'd' is 1, the result is
placed back in register 'f' (default).
If the result is not 0, the next
instruction, which is already
fetched, is discarded, and a NOP is
executed instead, making it a two-
cycle instruction. If 鈥榓(ch菐n)鈥� is 0, the
Access Bank will be selected, over-
riding the BSR value. If 鈥榓(ch菐n)鈥� = 1, then
the bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
Write to
destination
If skip:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
Q4
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Example:
HERE
INFSNZ
REG, 1, 0
ZERO
NZERO
Before Instruction
PC
=
Address (HERE)
After Instruction
REG
=
REG + 1
If REG
鈮�
0;
PC
=
Address (NZERO)
If REG
=
0;
PC
=
Address (ZERO)
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PIC18F4550-I/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32kBF 2048RM FSUSB2 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC18F4550-I/P 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32kBF 2048RM FSUSB2 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC18F4550-I/PT 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32kBF 2048RM FSUSB2 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC18F4550T-I/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32kBF 2048RM FSUSB2 RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT