PIC18F1230/1330
DS39758D-page 104
2009 Microchip Technology Inc.
11.5
RCON Register
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
The operation of the SBOREN bit and the Reset flag
.
REGISTER 11-13: RCON: RESET CONTROL REGISTER
R/W-0
R/W-1(1)
U-0
R/W-1
R-1
R/W-0(2)
R/W-0
IPEN
SBOREN
—RI
TO
PD
POR
BOR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
IPEN:
Interrupt Priority Enable bit
1
= Enable priority levels on interrupts
0
= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6
SBOREN:
BOR Software Enable bit(1)
bit 5
Unimplemented:
Read as ‘0’
bit 4
RI: RESET
Instruction Flag bit
bit 3
TO:
Watchdog Time-out Flag bit
bit 2
PD:
Power-Down Detection Flag bit
bit 1
POR:
Power-on Reset Status bit(2)
bit 0
BOR:
Brown-out Reset Status bit
Note 1:
If SBOREN is enabled, its Reset state is ‘1’; otherwise, it is ‘0’. See
Register 5-1 for additional information.
2:
The actual Reset value of POR is determined by the type of device Reset. See
Register 5-1 for additional
information.
