參數(shù)資料
型號(hào): PIC16LCR620AT-04I/SO
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, RISC MICROCONTROLLER, PDSO18
封裝: 0.300 INCH, PLASTIC, MS-013, SO-18
文件頁(yè)數(shù): 42/128頁(yè)
文件大?。?/td> 3677K
代理商: PIC16LCR620AT-04I/SO
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)當(dāng)前第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)
PIC16C62X
DS30235J-page 18
2003 Microchip Technology Inc.
4.2.2.1
STATUS Register
The STATUS register, shown in Register 4-1, contains
the arithmetic status of the ALU, the RESET status and
the bank select bits for data memory.
The STATUS register can be the destination for any
instruction, like any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as 000uu1uu (where u = unchanged).
It is recommended, therefore, that only BCF,
BSF,
SWAPF
and MOVWF instructions are used to alter the
STATUS register, because these instructions do not
affect any STATUS bit. For other instructions not
affecting any STATUS bits, see the “Instruction Set
Summary”.
REGISTER 4-1:
STATUS REGISTER (ADDRESS 03H OR 83H)
Note 1: The IRP and RP1 bits (STATUS<7:6>)
are not used by the PIC16C62X and
should be programmed as ’0'. Use of
these bits as general purpose R/W bits is
NOT recommended, since this may affect
upward compatibility with future products.
2: The C and DC bits operate as a Borrow
and Digit Borrow out bit, respectively, in
subtraction. See the SUBLW and SUBWF
instructions for examples.
Reserved
R/W-0
R-1
R/W-x
IRP
RP1
RP0
TO
PD
ZDC
C
bit 7
bit 0
bit 7
IRP: Register Bank Select bit (used for indirect addressing)
1
= Bank 2, 3 (100h - 1FFh)
0
= Bank 0, 1 (00h - FFh)
The IRP bit is reserved on the PIC16C62X; always maintain this bit clear.
bit 6-5
RP<1:0>: Register Bank Select bits (used for direct addressing)
01
= Bank 1 (80h - FFh)
00
= Bank 0 (00h - 7Fh)
Each bank is 128 bytes. The RP1 bit is reserved on the PIC16C62X; always maintain this bit
clear.
bit 4
TO: Time-out bit
1
= After power-up, CLRWDT instruction, or SLEEP instruction
0
= A WDT time-out occurred
bit 3
PD: Power-down bit
1
= After power-up or by the CLRWDT instruction
0
= By execution of the SLEEP instruction
bit 2
Z: Zero bit
1
= The result of an arithmetic or logic operation is zero
0
= The result of an arithmetic or logic operation is not zero
bit 1
DC: Digit carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)(for borrow the polarity
is reversed)
1
= A carry-out from the 4th low order bit of the result occurred
0
= No carry-out from the 4th low order bit of the result
bit 0
C: Carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
1
= A carry-out from the Most Significant bit of the result occurred
0
= No carry-out from the Most Significant bit of the result occurred
Note:
For borrow the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low order bit of the source register.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
相關(guān)PDF資料
PDF描述
PIC16C711-04E/SS 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO20
PIC16C715-20/P301 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PDIP18
PIC16C773-20I/SS 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PDSO28
PIC16C774T-04/L 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PQCC44
PIC16CR65 Complete Mid-Range Reference Manual
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PIC16LF1454-E/ML 制造商:Microchip Technology Inc 功能描述:7 KB FLASH, 512 BYTES RAM, 48 MHZ INT. OSC, 12 I/0, ENHANCED - Rail/Tube 制造商:Microchip Technology Inc 功能描述:IC MCU 8BIT 7KB FLASH 16QFN 制造商:Microchip Technology Inc 功能描述:8-bit Microcontrollers - MCU 7KB Flsh 512b RAM 48MHz Int Osc 12 I/0
PIC16LF1454-E/P 制造商:Microchip Technology Inc 功能描述:7 KB FLASH, 512 BYTES RAM, 48 MHZ INT. OSC, 12 I/0, ENHANCED - Rail/Tube 制造商:Microchip Technology Inc 功能描述:IC MCU 8BIT 7KB FLASH 14PDIP
PIC16LF1454-E/SL 制造商:Microchip Technology Inc 功能描述:7 KB FLASH, 512 BYTES RAM, 48 MHZ INT. OSC, 12 I/0, ENHANCED - Rail/Tube 制造商:Microchip Technology Inc 功能描述:7 KB Flash, 512 bytes RAM, 48 MHz Int. Osc, 12 I/0, Enhanced Mid Range Core, USB 2.0, NanoWatt XLP
PIC16LF1454-E/ST 制造商:Microchip Technology Inc 功能描述:7 KB FLASH, 512 BYTES RAM, 48 MHZ INT. OSC, 12 I/0, ENHANCED - Rail/Tube 制造商:Microchip Technology Inc 功能描述:IC MCU 8BIT 7KB FLASH 14TSSOP
PIC16LF1454-I/ML 功能描述:8位微控制器 -MCU 7 KB Flash 512 bytes RAM 48 MHz Int Osc RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT