參數(shù)資料
型號: PIC16F72-I/ML
廠商: Microchip Technology
文件頁數(shù): 79/136頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 2KX14 28-QFN
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 61
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 管件
產(chǎn)品目錄頁面: 639 (CN2011-ZH PDF)
配用: AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
其它名稱: PIC16F72-I/MLR
PIC16F72-I/MLR-ND
2007 Microchip Technology Inc.
DS39597C-page 45
PIC16F72
REGISTER 9-2:
SSPCON: SYNC SERIAL PORT CONTROL REGISTER (ADDRESS 14h)
R/W-0
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
bit 7
bit 0
bit 7
WCOL: Write Collision Detect bit
1
= The SSPBUF register is written while it is still transmitting the previous word (must be
cleared in software)
0
= No collision
bit 6
SSPOV: Receive Overflow Indicator bit
In SPI mode:
1
= A new byte is received while the SSPBUF register is still holding the previous data. In case
of overflow, the data in SSPSR is lost. Overflow can only occur in Slave mode. The user
must read the SSPBUF, even if only transmitting data, to avoid setting overflow. In Master
mode, the overflow bit is not set since each new reception (and transmission) is initiated
by writing to the SSPBUF register.
0
= No overflow
In I2C mode:
1
= A byte is received while the SSPBUF register is still holding the previous byte. SSPOV
is a "don’t care" in Transmit mode. SSPOV must be cleared in software in either mode.
0
= No overflow
bit 5
SSPEN: Synchronous Serial Port Enable bit
In SPI mode:
1
= Enables serial port and configures SCK, SDO, and SDI as serial port pins
0
= Disables serial port and configures these pins as I/O port pins
In I2C mode:
1
= Enables the serial port and configures the SDA and SCL pins as serial port pins
0
= Disables serial port and configures these pins as I/O port pins
In both modes, when enabled, these pins must be properly configured as input or output.
bit 4
CKP: Clock Polarity Select bit
In SPI mode:
1
= IDLE state for clock is a high level (Microwire default)
0
= IDLE state for clock is a low level (Microwire alternate)
In I2C mode:
SCK release control
1
= Enable clock
0
= Holds clock low (clock stretch - used to ensure data setup time)
bit 3-0
SSPM<3:0>: Synchronous Serial Port Mode Select bits
0000
= SPI Master mode, clock = FOSC/4
0001
= SPI Master mode, clock = FOSC/16
0010
= SPI Master mode, clock = FOSC/64
0011
= SPI Master mode, clock = TMR2 output/2
0100
= SPI Slave mode, clock = SCK pin. SS pin control enabled.
0101
= SPI Slave mode, clock = SCK pin. SS pin control disabled. SS can be used as I/O pin.
0110
=I2C Slave mode, 7-bit address
0111
=I2C Slave mode, 10-bit address
1011
=I2C firmware controlled Master mode (Slave IDLE)
1110
=I2C Slave mode, 7-bit address with START and STOP bit interrupts enabled
1111
=I2C Slave mode, 10-bit address with START and STOP bit interrupts enabled
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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