參數(shù)資料
型號： PIC16F716-I/P
廠商： Microchip Technology
文件頁數(shù)： 48/136頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 2KX14 18DIP
產(chǎn)品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 25
系列： PIC® 16F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 3.5KB（2K x 14）
程序存儲器類型： 閃存
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 18-DIP（0.300"，7.62mm）
包裝： 管件
產(chǎn)品目錄頁面： 639 (CN2011-ZH PDF)
配用： I3-DB16F716-ND - BOARD DAUGHTER ICEPIC3
AC162054-ND - HEADER INTERFACE ICD2 16F716
ACICE0202-ND - ADAPTER MPLABICE 18P 300 MIL
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
2007 Microchip Technology Inc.
DS41206B-page 17
PIC16F716
2.3
PCL and PCLATH
The Program Counter (PC) is 13 bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The high byte (PC<12:8>) is not directly
readable or writable and comes from PCLATH. On any
Reset, the PC is cleared. Figure 2-3 shows the two
situations for the loading of the PC. The upper example
in Figure 2-3 shows how the PC is loaded on a write to
PCL (PCLATH<4:0>
→ PCH). The lower example in
Figure 2-3 shows how the PC is loaded during a CALL or
GOTO
instruction (PCLATH<4:3>
→ PCH).
2.3.1
MODIFYING PCL
Executing any instruction with the PCL register as the
destination simultaneously causes the Program
Counter PC<12:8> bits (PCH) to be replaced by the
contents of the PCLATH register. This allows the entire
contents of the program counter to be changed by
writing the desired upper 5 bits to the PCLATH register.
When the lower 8 bits are written to the PCL register, all
13 bits of the program counter will change to the values
contained in the PCLATH register and those being
written to the PCL register.
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). Care should be
exercised when jumping into a look-up table or
program branch table (computed GOTO) by modifying
the PCL register. Assuming that PCLATH is set to the
table start address, if the table length is greater than
255 instructions or if the lower 8 bits of the memory
address rolls over from 0xFF to 0x00 in the middle of
the table, then PCLATH must be incremented for each
address rollover that occurs between the table
beginning and the target location within the table.
For more information refer to Application Note AN556,
“Implementing a Table Read” (DS00556).
2.3.2
PROGRAM MEMORY PAGING
The CALL and GOTO instructions provide 11 bits of
address to allow branching within any 2K program
memory page. When doing a CALL or GOTO instruction,
the upper bit of the address is provided by
PCLATH<3>. When doing a CALL or GOTO instruction,
the user must ensure that the page select bit is
programmed so that the desired program memory
page is addressed. If a RETURN from a CALL instruction
(or interrupt) is executed, the entire 13-bit PC is pushed
onto the stack. Therefore, manipulation of the
PCLATH<3> bit is not required for the RETURN
instructions (which POPs the address from the stack).
FIGURE 2-3:
LOADING OF PC IN
DIFFERENT SITUATIONS
2.4
Stack
The stack allows a combination of up to 8 program calls
and interrupts to occur. The stack contains the return
address from this branch in program execution.
Mid-range devices have an 8-level deep x 13-bit wide
hardware stack. The stack space is not part of either
program or data space, and the Stack Pointer is not
readable or writable. The PC is PUSHed onto the stack
when a CALL instruction is executed or an interrupt
causes a branch. The stack is POPed in the event of a
RETURN,
RETLW
or a RETFIE instruction execution.
PCLATH is not modified when the stack is PUSHed or
POPed.
After the stack has been PUSHed 8 times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
Instruction with
PCL as
Destination
8
ALU
12
0
11
Opcode <10:0>
GOTO
, CALL
PCLATH<4:3>
PCLATH
87
PCLATH<4:0>
12 1110
8 7
0
PCH
PCL
PCH
PCL
5
2
相關PDF資料
PDF描述
PIC12C508A-04I/P IC MCU OTP 512X12 8DIP
PIC12F675-I/P IC MCU CMOS FLASH-BASE 8BIT 8DIP
PIC12F675-E/SN IC MCU CMOS 1K FLASH W/AD 8-SOIC
PIC16C765/JW IC MCU EPROM 8KX14 USB 40CDIP
PIC16LF1823-I/ML IC MCU 8BIT FLASH 16QFN
相關代理商/技術參數(shù)
參數(shù)描述
PIC16F716T-E/SO 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F716T-E/SS 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F716T-I/ML 制造商:Microchip Technology Inc 功能描述:MCU 8BIT RISC 28KB FLASH 2.5V/ - Tape and Reel
PIC16F716T-I/SO 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F716T-I/SS 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*