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2003 Microchip Technology Inc.
Preliminary
DS40300C-page 145
PIC16F62X
.
FIGURE 18-4:
TYPICAL IDD VS FOSC OVER VDD (XT MODE)
FIGURE 18-5:
TYPICAL IDD VS FOSC OVER VDD (LP MODE)
Note:
The graphs and tables provided in this section are for design guidance and are not tested.
Typical IDD vs FOSC over VDD
(XT m ode)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
FOSC (M Hz)
IDD
(mA)
PIC16LF628
2.5V
2.0V
5.5V
5.0V
4.5V
4.0V
3.5V
3.0V
Typical:
statistical mean @ 25掳C
Maximum: mean + 3蟽 (-40掳C to 125掳C)
Minimum: mean 鈥� 3蟽 (-40掳C to 125掳C)
Typical IDD vs FOSC over VDD
(LP mode)
0
10
20
30
40
50
60
70
80
90
30.000
40.000
50.000
60.000
70.000
80.000
90.000
100.000
FOSC (kHz)
Ipd
(uA)
PIC16LF628
2.5V
5.5V
5.0V
4.5V
4.0V
3.5V
3.0V
Typical:
statistical mean @ 25掳C
Maximum: mean + 3蟽 (-40掳C to 125掳C)
Minimum: mean 鈥� 3蟽 (-40掳C to 125掳C)
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| PIC16C62B-04/SO | IC MCU OTP 2KX14 PWM 28SOIC |
| PIC16C54A-10I/P | IC MCU OTP 512X12 18DIP |
| PIC18LF26K80-I/SS | MCU PIC 64KB FLASH 28SSOP |
| PIC16LC54A-04I/SO | IC MCU OTP 512X12 18SOIC |
| PIC18F26K80-I/SS | MCU PIC 64KB FLASH 28SSOP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F62804SO | 鍒堕€犲晢:MICROCHIP 鍔熻兘鎻忚堪:New |
| PIC16F628-20/P | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 224 RAM 16 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F628-20/P | 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:IC 8BIT FLASH MCU 16F628 DIP18 |
| PIC16F628-20/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 224 RAM 16 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16F628-20/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 224 RAM 16 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
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