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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC16F628-04/P |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 53/170闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MCU FLASH 2KX14 COMP 18DIP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 妯欐簴鍖呰锛� | 25 |
| 绯诲垪锛� | PIC® 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 4MHz |
| 閫ｉ€氭€э細 | UART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 16 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 3.5KB锛�2K x 14锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 128 x 8 |
| RAM 瀹归噺锛� | 224 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 3 V ~ 5.5 V |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 灏佽/澶栨锛� | 18-DIP锛�0.300"锛�7.62mm锛� |
| 鍖呰锛� | 绠′欢 |
| 閰嶇敤锛� | DVA16XP183-ND - ADAPTER ICE 18DIP/SOIC/SSOP AC164010-ND - MODULE SKT PROMATEII DIP/SOIC |
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PIC16F62X
DS40300C-page 144
Preliminary
2003 Microchip Technology Inc.
.
FIGURE 18-2:
MAXIMUM IDD VS FOSC OVER VDD (HS MODE)
FIGURE 18-3:
TYPICAL IDD VS FOSC OVER VDD (XT MODE)
Note:
The graphs and tables provided in this section are for design guidance and are not tested.
Maximum IDD vs FOSC over VDD
(HS mode)
0
1
2
3
4
5
6
7
4
6
8
10
12
14
16
18
20
FOSC (MHz)
IDD
(mA)
5.5V
5.0V
4.5V
4.0V
Typical:
statistical mean @ 25掳C
Maximum: mean + 3蟽 (-40掳C to 125掳C)
Minimum: mean 鈥� 3蟽 (-40掳C to 125掳C)
Typical IDD vs FOSC over VDD
(XT mode)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
FOSC (MHz)
IDD
(mA)
PIC16LF628
2.5V
2.0V
5.5V
5.0V
4.5V
4.0V
3.5V
3.0V
Typical:
statistical mean @ 25掳C
Maximum: mean + 3蟽 (-40掳C to 125掳C)
Minimum: mean 鈥� 3蟽 (-40掳C to 125掳C)
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