參數(shù)資料
型號: PIC16CE625T-30/SS
廠商: Microchip Technology
文件頁數(shù): 21/100頁
文件大?。?/td> 0K
描述: IC MCU OTP 2KX14 EE COMP 20SSOP
標準包裝: 1,600
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 30MHz
外圍設備: 欠壓檢測/復位,POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: OTP
EEPROM 大?。?/td> 128 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
其它名稱: PIC16CE625T30/SS
1999 Microchip Technology Inc.
DS40182C-page 17
PIC16CE62X
4.2.2.3
INTCON REGISTER
The INTCON register is a readable and writable
register which contains the various enable and flag bits
for all interrupt sources except the comparator module.
See
and
for
a
description of the comparator enable and flag bits.
Note:
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
REGISTER 4-3:
INTCON REGISTER (ADDRESS 0BH OR 8BH)
R/W-0
R/W-x
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
-n = Value at POR reset
-x = Unknown at POR reset
bit7
bit0
bit 7:
GIE: Global Interrupt Enable bit
1
= Enables all un-masked interrupts
0
= Disables all interrupts
bit 6:
PEIE: Peripheral Interrupt Enable bit
1
= Enables all un-masked peripheral interrupts
0
= Disables all peripheral interrupts
bit 5:
T0IE: TMR0 Overflow Interrupt Enable bit
1
= Enables the TMR0 interrupt
0
= Disables the TMR0 interrupt
bit 4:
INTE: RB0/INT External Interrupt Enable bit
1
= Enables the RB0/INT external interrupt
0
= Disables the RB0/INT external interrupt
bit 3:
RBIE: RB Port Change Interrupt Enable bit
1
= Enables the RB port change interrupt
0
= Disables the RB port change interrupt
bit 2:
T0IF: TMR0 Overflow Interrupt Flag bit
1
= TMR0 register has overflowed (must be cleared in software)
0
= TMR0 register did not overflow
bit 1:
INTF: RB0/INT External Interrupt Flag bit
1
= The RB0/INT external interrupt occurred (must be cleared in software)
0
= The RB0/INT external interrupt did not occur
bit 0:
RBIF: RB Port Change Interrupt Flag bit
1
= When at least one of the RB<7:4> pins changed state (must be cleared in software)
0
= None of the RB<7:4> pins have changed state
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