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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC16C770T-E/SS |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 91/220闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU OTP 2KX14 A/D PWM 20SSOP |
| 妯欐簴鍖呰锛� | 1,600 |
| 绯诲垪锛� | PIC® 16C |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI |
| 澶栧湇瑷倷锛� | 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 15 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 3.5KB锛�2K x 14锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | OTP |
| RAM 瀹归噺锛� | 256 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 4 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 6x12b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 灏佽/澶栨锛� | 20-SSOP锛�0.209"锛�5.30mm 瀵級 |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 閰嶇敤锛� | XLT20SS1-1-ND - SOCKET TRANSITION 20DIP 20SSOP |
| 鍏跺畠鍚嶇ū锛� | PIC16C770TE/SS |
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PIC16C717/770/771
DS41120B-page 178
2002 Microchip Technology Inc.
TABLE 15-22: MASTER SSP I2C BUS DATA REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max
Units
Conditions
100*
THIGH
Clock high time
100 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
400 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
1 MHz mode(1)
2(TOSC)(BRG + 1)
鈥�
ms
101*
TLOW
Clock low time
100 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
400 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
1 MHz mode(1)
2(TOSC)(BRG + 1)
鈥�
ms
102*
TR
SDA and SCL
rise time
100 kHz mode
鈥�
1000
ns
Cb is specified to be from
10 to 400 pF
400 kHz mode
20 + 0.1Cb
300
ns
1 MHz mode(1)
鈥�
300
ns
103*
TF
SDA and SCL
fall time
100 kHz mode
鈥�
300
ns
Cb is specified to be from
10 to 400 pF
400 kHz mode
20 + 0.1Cb
300
ns
1 MHz mode(1)
鈥�
100
ns
90*
TSU:STA
START condition
setup time
100 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
Only relevant for Repeated
START
condition
400 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
1 MHz mode(1)
2(TOSC)(BRG + 1)
鈥�
ms
91*
THD:STA
START condition
hold time
100 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
After this period the first clock
pulse is generated
400 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
1 MHz mode(1)
2(TOSC)(BRG + 1)
鈥�
ms
106*
THD:DAT
Data input
hold time
100 kHz mode
0
鈥�
ns
400 kHz mode
0
0.9
ms
1 MHz mode(1)
TBD
鈥�
ns
107*
TSU:DAT
Data input
setup time
100 kHz mode
250
鈥�
ns
Note 2
400 kHz mode
100
鈥�
ns
1 MHz mode(1)
TBD
鈥�
ns
92*
TSU:STO
STOP condition
setup time
100 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
400 kHz mode
2(TOSC)(BRG + 1)
鈥�
ms
1 MHz mode(1)
2(TOSC)(BRG + 1)
鈥�
ms
109*
TAA
Output valid from
clock
100 kHz mode
鈥�
3500
ns
400 kHz mode
鈥�
1000
ns
1 MHz mode(1)
鈥斺€�
ns
110
TBUF
Bus free time
100 kHz mode
4.7 鈥�
ms
Time the bus must be free
before a new transmission
can start
400 kHz mode
1.3 鈥�
ms
1 MHz mode(1)
TBD鈥�
ms
D102
Cb
Bus capacitive loading
鈥�
400
pF
*
These parameters are characterized but not tested. For the value required by the I2C specification, please refer to the
PICmicroTM Mid-Range MCU Family Reference Manual (DS33023).
These parameters are for design guidance only and are not tested, nor characterized.
Note
1: Maximum pin capacitance = 10 pF for all I2C pins.
2: A Fast mode I2C bus device can be used in a Standard mode I2C bus system, but (TSU:DAT)
鈮� 250 ns must then be met.
This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does
stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
[(TR)+ (TSU:DAT) = 1000 + 250 = 1250 ns], for 100 kHz mode, before the SCL line is released.
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鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16C770T-I/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 256 RAM 16 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16C770T-I/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB 256 RAM 16 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16C771/JW | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 256 RAM 16 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16C771/P | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 7KB 256 RAM 16 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC16C771/P | 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:IC 8BIT CMOS MCU 16C771 DIP20 |
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