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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC16C770T-E/SS
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 57/220闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC MCU OTP 2KX14 A/D PWM 20SSOP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 1,600
绯诲垪锛� PIC® 16C
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 20MHz
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澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯/寰�(f霉)浣嶏紝POR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 15
绋嬪簭瀛樺劜鍣ㄥ閲忥細 3.5KB锛�2K x 14锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 OTP
RAM 瀹归噺锛� 256 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 6x12b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
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鍖呰锛� 甯跺嵎 (TR)
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鍏跺畠鍚嶇ū锛� PIC16C770TE/SS
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2002 Microchip Technology Inc.
DS41120B-page 13
PIC16C717/770/771
Bank 2
100h(3)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
0000 0000
101h
TMR0
Timer0 module鈥檚 register
xxxx xxxx
102h(3)
PCL
Program Counter's (PC) Least Significant Byte
0000 0000
103h(3)
STATUS
IRP
RP1
RP0
TO
PD
ZDC
C
0001 1xxx
104h(3)
FSR
Indirect data memory address pointer
xxxx xxxx
105h
鈥�
Unimplemented
鈥�
106h
PORTB
PORTB Data Latch when written: PORTB pins when read
xxxx xx11
107h
鈥�
Unimplemented
鈥�
108h
鈥�
Unimplemented
鈥�
109h
鈥�
Unimplemented
鈥�
10Ah(1,3) PCLATH
鈥�
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
10Bh(3)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
10Ch
PMDATL
Program memory read data low
xxxx xxxx
10Dh
PMADRL
Program memory read address low
xxxx xxxx
10Eh
PMDATH
鈥�
Program memory read data high
--xx xxxx
10Fh
PMADRH
鈥�
Program memory read address high
---- xxxx
110h-
11Fh
鈥�
Unimplemented
鈥�
Bank 3
180h(3)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
0000 0000
181h
OPTION_REG
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
182h(3)
PCL
Program Counter's (PC) Least Significant Byte
0000 0000
183h(3)
STATUS
IRP
RP1
RP0
TO
PD
ZDC
C
0001 1xxx
184h(3)
FSR
Indirect data memory address pointer
xxxx xxxx
185h
鈥�
Unimplemented
鈥�
186h
TRISB
PORTB Data Direction Register
1111 1111
187h
鈥�
Unimplemented
鈥�
188h
鈥�
Unimplemented
鈥�
189h
鈥�
Unimplemented
鈥�
18Ah(1,3) PCLATH
鈥�
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
18Bh(3)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
18Ch
PMCON1
Reserved
鈥�
RD
1--- ---0
18Dh-
18Fh
鈥�
Unimplemented
鈥�
TABLE 2-1:
PIC16C717/770/771 SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Details
on
Page:
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as 鈥�0鈥�.
Shaded locations are unimplemented, read as 鈥�0鈥�.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
contents are transferred to the upper byte of the program counter.
2: Other (non Power-up) Resets include external RESET through MCLR and Watchdog Timer Reset.
3: These registers can be addressed from any bank.
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