參數(shù)資料
型號: PIC16C765T-I/L
廠商: Microchip Technology
文件頁數(shù): 88/165頁
文件大?。?/td> 0K
描述: IC MCU OTP 8KX14 USB 44PLCC
標準包裝: 500
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 24MHz
連通性: SCI,UART/USART,USB
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 33
程序存儲器容量: 14KB(8K x 14)
程序存儲器類型: OTP
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4.35 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 帶卷 (TR)
其它名稱: PIC16C765TI/L
2000 Microchip Technology Inc.
Preliminary
DS41124C-page 29
PIC16C745/765
4.3
PCL and PCLATH
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the
PCLATH register. On any RESET, the upper bits of the
PC will be cleared. Figure 4-3 shows the two situations
for the loading of the PC. The upper example in the fig-
ure shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
→ PCH). The lower example in the fig-
ure shows how the PC is loaded during a CALL or GOTO
instruction (PCLATH<4:3>
→ PCH).
FIGURE 4-3:
LOADING OF PC IN
DIFFERENT SITUATIONS
4.3.1
COMPUTED GOTO
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application note “Implementing a Table Read" (AN556).
4.3.2
STACK
The PIC16C745/765 family has an 8-level deep x 13-
bit wide hardware stack. The stack space is not part of
either program or data space and the stack pointer is
not readable or writable. The PC is PUSHed onto the
stack when a CALL instruction is executed or an inter-
rupt causes a branch. The stack is POPed in the event
of a RETURN,RETLW or a RETFIE instruction execu-
tion. PCLATH is not affected by a PUSH or POP opera-
tion.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
4.4
Program Memory Paging
PIC16CXX devices are capable of addressing a contin-
uous 8K word block of program memory. The CALL and
GOTO
instructions provide only 11 bits of address to
allow branching within any 2K program memory page.
When doing a CALL or GOTO instruction, the upper 2
bits of the address are provided by PCLATH<4:3>.
When doing a CALL or GOTO instruction, the user must
ensure that the page select bits are programmed so
that the desired program memory page is addressed. If
a return from a CALL instruction (or interrupt) is exe-
cuted, the entire 13-bit PC is pushed onto the stack.
Therefore, manipulation of the PCLATH<4:3> bits is
not required for the return instructions (which POPs the
address from the stack).
Example 4-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the interrupt ser-
vice routine (if interrupts are used).
EXAMPLE 4-1:
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
ORG
0x500
BSF
PCLATH,3
;Select page 1 (800h-FFFh)
CALL SUB1_P1
;Call subroutine in
:
;page 1 (800h-FFFh)
:
ORG
0x900
;page 1 (800h-FFFh)
SUB1_P1
:
;called subroutine
:
;page 1 (800h-FFFh)
:
RETURN
;return to Call subroutine
;in page 0 (000h-7FFh)
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
Instruction with
ALU
GOTO,CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
87
2
PCLATH
PCH
PCL
PCL as
Destination
Note 1: There are no status bits to indicate stack
overflow or stack underflow conditions.
2: There are no instructions/mnemonics
called PUSH or POP. These are actions that
occur from the execution of the CALL,
RETURN,
RETLW,
and RETFIE instruc-
tions, or the vectoring to an interrupt
address.
745cov.book Page 29 Wednesday, August 2, 2000 8:24 AM
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