參數(shù)資料
型號: PIC16C622T-20I/SO
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PDSO18
封裝: 0.300 INCH, PLASTIC, MS-013, SO-18
文件頁數(shù): 76/128頁
文件大?。?/td> 3677K
代理商: PIC16C622T-20I/SO
2003 Microchip Technology Inc.
DS30235J-page 49
PIC16C62X
9.3
RESET
The PIC16C62X differentiates between various kinds
of RESET:
a)
Power-on Reset (POR)
b)
MCLR Reset during normal operation
c)
MCLR Reset during SLEEP
d)
WDT Reset (normal operation)
e)
WDT wake-up (SLEEP)
f)
Brown-out Reset (BOR)
Some registers are not affected in any RESET
condition Their status is unknown on POR and
unchanged in any other RESET. Most other registers
are reset to a “RESET state” on Power-on Reset,
MCLR Reset, WDT Reset and MCLR Reset during
SLEEP. They are not affected by a WDT wake-up,
since this is viewed as the resumption of normal
operation. TO and PD bits are set or cleared differently
in different RESET situations as indicated in Table 9-2.
These bits are used in software to determine the nature
of the RESET. See Table 9-5 for a full description of
RESET states of all registers.
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 9-6.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 12-5 for pulse width
specification.
FIGURE 9-6:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External
RESET
MCLR/
V
DD
OSC1/
WDT
Module
V
DD rise
detect
OST/PWRT
On-chip(1)
RC OSC
WDT
Time-out
Power-on Reset
OST
PWRT
Chip_Reset
10-bit Ripple-counter
Reset
Enable OST
Enable PWRT
SLEEP
See Table 9-1 for time-out situations.
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
Brown-out
Reset
BODEN
CLKIN
Pin
V
PP Pin
10-bit Ripple-counter
Q
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