參數(shù)資料
型號(hào): PIC16C558-04/P
廠商: Microchip Technology
文件頁(yè)數(shù): 34/108頁(yè)
文件大小: 0K
描述: IC MCU OTP 2KX14 18DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 25
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 13
程序存儲(chǔ)器容量: 3.5KB(2K x 14)
程序存儲(chǔ)器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 18-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 636 (CN2011-ZH PDF)
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1059-ND - ADAPTER 18 ZIF BD W/18SO PLUGS
DVA16XP180-ND - ADAPTER DEVICE FOR MPLAB-ICE
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
2002 Microchip Technology Inc.
Preliminary
DS40143D-page 29
PIC16C55X
EXAMPLE 5-1:
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
5.4.2
SUCCESSIVE OPERATIONS ON I/O
PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle, as shown
in Figure 5-6. Therefore, care must be exercised if a
write followed by a read operation is carried out on the
same I/O port. The sequence of instructions should be
such to allow the pin voltage to stabilize (load
dependent) before the next instruction which causes
that file to be read into the CPU is executed. Otherwise,
the previous state of that pin may be read into the CPU
rather than the new state. When in doubt, it is better to
separate these instructions with an NOP or another
instruction not accessing this I/O port.
FIGURE 5-6:
SUCCESSIVE I/O OPERATION
; Initial PORT settings: PORTB<7:4> Inputs
;
PORTB<3:0> Outputs
; PORTB<7:6> have external pull-up and are
; not connected to other circuitry
;
PORT latch PORT pins
;
---------- ---------
;
BCF PORTB, 7
; 01pp pppp
11pp pppp
BCF PORTB, 6
; 10pp pppp
11pp pppp
BSF STATUS, RP0 ;
BCF TRISB, 7
; 10pp pppp
11pp pppp
BCF TRISB, 6
; 10pp pppp
10pp pppp
Note
1: This example shows write to PORTB followed by a read from PORTB.
2: Data setup time = (0.25 T
CY - TPD) where TCY = instruction cycle and TPD = propagation delay of Q1 cycle to
output valid. Therefore, at higher clock frequencies, a write followed by a read may be problematic.
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
RB <7:0>
Port pin
sampled here
PC
PC + 1
PC + 2
PC + 3
NOP
MOVF PORTB, W
Read PORTB
MOVWF PORTB
Write to
PORTB
PC
Instruction
fetched
T PD
Execute
MOVWF
PORTB
Execute
MOVF
PORTB, W
Execute
NOP
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