參數(shù)資料
型號(hào): PIC16C505
廠商: Microchip Technology Inc.
英文描述: 14-Pin, 8-Bit CMOS Microcontroller(每個(gè)I/O口有25mA驅(qū)動(dòng)/吸收電流,12個(gè)I/O口,帶WDT的微控制器)
中文描述: 14引腳,8位CMOS微控制器(每個(gè)的I / O口有25毫安驅(qū)動(dòng)/吸收電流,12個(gè)的I / O口,帶看門狗的微控制器)
文件頁(yè)數(shù): 19/80頁(yè)
文件大小: 617K
代理商: PIC16C505
1998 Microchip Technology Inc.
Preliminary
DS40192A-page 19
PIC16C505
5.0
I/O PORT
As with any other register, the I/O register can be
written and read under program control. However,
read instructions (e.g.,
MOVF PORTB,W
) always read
the I/O pins independent of the pin’s input/output
modes. On RESET, all I/O ports are defined as input
(inputs are at hi-impedance) since the I/O control
registers are all set.
5.1
PORTB
PORTB is an 8-bit I/O register. Only the low order 6
bits are used (RB5:RB0). Bits 7 and 6 are
unimplemented and read as '0's. Please note that RB3
is an input only pin. The configuration word can set
several I/O’s to alternate functions. When acting as
alternate functions the pins will read as ‘0’ during port
read. Pins RB0, RB1, RB3 and RB4 can be configured
with weak pull-ups and also with wake-up on change.
The wake-up on change and weak pull-up functions
are not pin selectable. If pin 4 is configured as MCLR,
weak pull-up is always off and wake-up on change for
this pin is not enabled.
5.2
PORTC
PORTC is an 8-bit I/O register. Only the low order 6
bits are used (RC5:RC0). Bits 7 and 6 are unimple-
mented and read as ‘0’s.
5.3
TRIS Registers
The output driver control register is loaded with the
contents of the W register by executing the
TRIS
f
instruction. A '1' from a TRIS register bit puts the
corresponding output driver in a hi-impedance mode.
A '0' puts the contents of the output data latch on the
selected pins, enabling the output buffer. The
exceptions are RB3 which is input only and RC5 which
may be controlled by the option register, see Figure 4-
4.
The TRIS registers are “write-only” and are set (output
drivers disabled) upon RESET.
Note:
A read of the ports reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high,
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
5.4
I/O Interfacing
The equivalent circuit for an I/O port pin is shown in
Figure 5-1. All port pins, except RB3 which is input
only, may be used for both input and output
operations. For input operations these ports are non-
latching. Any input must be present until read by an
input instruction (e.g.,
MOVF PORTB,W
). The outputs
are latched and remain unchanged until the output
latch is rewritten. To use a port pin as output, the
corresponding direction control bit in TRIS must be
cleared (= 0). For use as an input, the corresponding
TRIS bit must be set. Any I/O pin (except RB3) can be
programmed individually as input or output.
FIGURE 5-1:
EQUIVALENT CIRCUIT
FOR A SINGLE I/O PIN
Note 1: I/O pins have protection diodes to V
DD
and V
SS
.
Data
Bus
Q
D
Q
CK
Q
D
Q
CK
P
N
WR
Port
TRIS ‘f’
Data
Latch
TRIS
Latch
RD Port
V
SS
V
DD
I/O
pin
(1)
W
Reg
Reset
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