參數(shù)資料
型號: PIC12F683T-I/SN
廠商: Microchip Technology
文件頁數(shù): 8/176頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 2KX14 8-SOIC
產(chǎn)品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
Digi-Key 應用說明: AN0005 PWM Example with Microchip's CCP Module
AN0005 Example Code
標準包裝: 3,300
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
EEPROM 大小: 256 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 帶卷 (TR)
產(chǎn)品目錄頁面: 645 (CN2011-ZH PDF)
配用: AC162058-ND - HEADER MPLAB ICD2 FOR PIC12F683
I3-DB12F683-ND - BOARD DAUGHTER ICEPIC3
其它名稱: PIC12F683T-I/SN-ND
PIC12F683T-I/SNTR
2007 Microchip Technology Inc.
DS41211D-page 103
PIC12F683
13.2
Instruction Descriptions
ADDLW
Add literal and W
Syntax:
[ label ] ADDLW
k
Operands:
0
≤ k ≤ 255
Operation:
(W) + k
→ (W)
Status Affected:
C, DC, Z
Description:
The contents of the W register
are added to the eight-bit literal ‘k’
and the result is placed in the
W register.
ADDWF
Add W and f
Syntax:
[ label ] ADDWF
f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(W) + (f)
→ (destination)
Status Affected:
C, DC, Z
Description:
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If
‘d’ is ‘1’, the result is stored back
in register ‘f’.
ANDLW
AND literal with W
Syntax:
[ label ] ANDLW
k
Operands:
0
≤ k ≤ 255
Operation:
(W) .AND. (k)
→ (W)
Status Affected:
Z
Description:
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
ANDWF
AND W with f
Syntax:
[ label ] ANDWF
f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(W) .AND. (f)
→ (destination)
Status Affected:
Z
Description:
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
BCF
Bit Clear f
Syntax:
[ label ] BCF
f,b
Operands:
0
≤ f ≤ 127
0
≤ b ≤ 7
Operation:
0
→ (f<b>)
Status Affected:
None
Description:
Bit ‘b’ in register ‘f’ is cleared.
BSF
Bit Set f
Syntax:
[ label ] BSF
f,b
Operands:
0
≤ f ≤ 127
0
≤ b ≤ 7
Operation:
1
→ (f<b>)
Status Affected:
None
Description:
Bit ‘b’ in register ‘f’ is set.
BTFSC
Bit Test f, Skip if Clear
Syntax:
[ label ] BTFSC f,b
Operands:
0
≤ f ≤ 127
0
≤ b ≤ 7
Operation:
skip if (f<b>) = 0
Status Affected:
None
Description:
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’, in register ‘f’, is ‘0’, the
next instruction is discarded, and
a NOP is executed instead, making
this a 2-cycle instruction.
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