2007 Microchip Technology Inc.
DS41211D-page 83
PIC12F683
12.0
SPECIAL FEATURES OF THE
CPU
The PIC12F683 has a host of features intended to
maximize system reliability, minimize cost through
elimination of external components, provide power
saving features and offer code protection.
These features are:
Reset
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
Interrupts
Watchdog Timer (WDT)
Oscillator Selection
Sleep
Code Protection
ID Locations
In-Circuit Serial Programming
The PIC12F683 has two timers that offer necessary
delays on power-up. One is the Oscillator Start-up Timer
(OST), intended to keep the chip in Reset until the crys-
tal oscillator is stable. The other is the Power-up Timer
(PWRT), which provides a fixed delay of 64 ms (nomi-
nal) on power-up only, designed to keep the part in
Reset while the power supply stabilizes. There is also
circuitry to reset the device if a brown-out occurs, which
can use the Power-up Timer to provide at least a 64 ms
Reset. With these three functions on-chip, most
applications need no external Reset circuitry.
The Sleep mode is designed to offer a very low-current
Power-down mode. The user can wake-up from Sleep
through:
External Reset
Watchdog Timer Wake-up
An interrupt
Several oscillator options are also made available to
allow the part to fit the application. The INTOSC option
saves system cost while the LP crystal option saves
power. A set of Configuration bits are used to select
12.1
Configuration Bits
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’) to select various
These bits are mapped in program memory location
2007h.
Note:
Address
2007h is
beyond the user
program memory space. It belongs to the
special
configuration
memory
space
(2000h-3FFFh), which can be accessed
only
during
programming.
See
“PIC12F6XX/16F6XX Memory Program-
ming Specification” (DS41204) for more
information.
