參數(shù)資料
型號： PIC12F635-I/MD
廠商： Microchip Technology
文件頁數(shù)： 44/74頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 1KX14 8DFN
產品培訓模塊： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝： 91
系列： PIC® 12F
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
外圍設備： 欠壓檢測/復位，POR，WDT
輸入/輸出數(shù)： 5
程序存儲器容量： 1.75KB（1K x 14）
程序存儲器類型： 閃存
EEPROM 大小： 128 x 8
RAM 容量： 64 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 8-VDFN 裸露焊盤
包裝： 管件
產品目錄頁面： 637 (CN2011-ZH PDF)
配用： AC164326-ND - MODULA SKT PM3 20QFN
XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN
AC162057-ND - MPLAB ICD 2 HEADER 14DIP
XLT08DFN-ND - SOCKET TRANSITION ICE 8DFN
Micrel, Inc.
KSZ8841-PMQL
October 2007
49
M9999-100407-1.5
Wakeup Frame 0 Byte Mask 3 Register (Offset 0x022A): WF0BM3
This register contains the last 16 bytes mask values of the Wake up frame 0 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 0; setting bit 15 selects the 64th byte of the Wake up frame 0.
Bit
Default
R/W
Description
15 - 0
--
RW
WF0BM2
Wake up Frame 0 Byte Mask 3
The last 16 bytes mask covering bytes 49 to 64 of a wake up frame 0
pattern.
Wakeup Frame 1 CRC0 Register (Offset 0x0230): WF1CRC0
This register contains the expected CRC values of the Wake up frame 1 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Bit
Default
R/W
Description
15 - 0
--
RW
WF1CRC0
Wake up Frame 1 CRC (lower 16 bits)
The expected CRC value of a wake up frame 1 pattern.
Wakeup Frame 1 CRC1 Register (Offset 0x0232): WF1CRC1
This register contains the expected CRC values of the Wake up frame 1 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Bit
Default
R/W
Description
15 - 0
--
RW
WF1CRC1
Wake up Frame 1 CRC (upper 16 bits)
The expected CRC value of a wake up frame 1 pattern.
Wakeup Frame 1 Byte Mask 0 Register (Offset 0x0234): WF1BM0
This register contains the first 16 bytes mask values of the Wake up frame 1 pattern. Setting bit 0 selects the first byte
of the Wake up frame 1; setting bit 15 selects the 16th byte of the Wake up frame 1.
Bit
Default
R/W
Description
15 - 0
--
RW
WF1BM0
Wake up Frame 1 Byte Mask 0
The first 16 bytes mask of a wake up frame 1 pattern.
Wakeup Frame 1 Byte Mask 1 Register (Offset 0x0236): WF1BM1
This register contains the next 16 bytes mask values of the Wake up frame 1 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 1; setting bit 15 selects the 32nd byte of the Wake up frame 1.
Bit
Default
R/W
Description
15 - 0
--
RW
WF1BM1
Wake up Frame 1 Byte Mask 1
The next 16 bytes mask covering bytes 17 to 32 of a wake up frame 1
pattern.
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