參數(shù)資料
型號： PIC10F222-E/OT
廠商： Microchip Technology
文件頁數(shù)： 9/86頁
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 512X12 SOT-23-6
標(biāo)準(zhǔn)包裝： 3,000
系列： PIC® 10F
核心處理器： PIC
芯體尺寸： 8-位
速度： 8MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 4
程序存儲器容量： 768B（512 x 12）
程序存儲器類型： 閃存
RAM 容量： 23 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： SOT-23-6
包裝： 散裝
2007 Microchip Technology Inc.
DS41270E-page 15
PIC10F220/222
TABLE 4-1:
SPECIAL FUNCTION REGISTER (SFR) SUMMARY
4.4
STATUS Register
This register contains the arithmetic status of the ALU,
the Reset status and the page preselect bit.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
Therefore, it is recommended that only BCF, BSF and
MOVWF
instructions be used to alter the STATUS regis-
ter. These instructions do not affect the Z, DC or C bits
from the STATUS register. For other instructions, which
do affect Status bits, see Instruction Set Summary.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-On
Reset(2)
Page #
00h
INDF
Uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
01h
TMR0
8-Bit Real-Time Clock/Counter
xxxx xxxx
02h
PCL(1)
Low Order 8 Bits of PC
1111 1111
03h
STATUS
GPWUF
—
—TO
PD
ZDC
C
0--1 1xxx
(3)
04h
FSR
Indirect Data Memory Address Pointer
111x xxxx
05h
OSCCAL
CAL6
CAL5
CAL4
CAL3
CAL2
CAL1
CAL0
FOSC4
1111 1110
06h
GPIO
—
GP3
GP2
GP1
GP0
---- xxxx
07h
ADCON0
ANS1
ANS0
—
CHS1
CHS0
GO/DONE
ADON
11-- 1100
08h
ADRES
Result of Analog-to-Digital Conversion
xxxx xxxx
N/A
TRISGPIO
—
I/O Control Register
---- 1111
N/A
OPTION
GPWU
GPPU
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
Legend:
– = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.
Note
1:
The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter” for an
explanation of how to access these bits.
2:
Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change
Reset.
3:
See Table 8-1 for other Reset specific values.
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