
1
PS8095B 10/07/98
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20-Bit Buffer Driver
with 3-STATE Outputs
PI74ALVCH162827
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are
produced in the Companys advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH162827 is a 20-bit non-inverting buffer/driver
designed for 2.3V to 3.6V V
CC
operation.
The buffer/driver is composed of two 10-bit sections with separate
output-enable signals. For either 10-bit buffer section, the two
output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must
both be low for the corresponding Y outputs to be active. If either
output-enable input is HIGH, the outputs of that 10-bit buffer
section are in the high-impedance state.
The outputs, which are designed to sink up to 12mA, include 26
resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
The PI74ALVCH162827 has Bus Hold which retains the data
inputs last state whenever the data input goes to high-impedance
preventing floating inputs and eliminating the need for pullup/
down resistors.
Product Features
PI74ALVCH162827 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
Output ports have equivalent 26
series resistors;
no external resistors are required
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at 40°C to +85°C
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
1
56
55
1
A
1
1
OE
2
1
OE
1
1
Y
1
2
To 9 Other Channels
28
29
42
2
A
1
2
OE
2
2
OE
1
2
Y
1
15
To 9 Other Channels