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參數(shù)資料
| 型號(hào)： | PHD3055L |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | PowerMOS transistor Logic level FET |
| 中文描述： | 12 A, 60 V, 0.18 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | PLASTIC PACKAGE-3 |
| 文件頁(yè)數(shù)： | 6/7頁(yè) |
| 文件大?。?/td> | 55K |
| 代理商： | PHD3055L |
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level FET
PHD3055L
MECHANICAL DATA
Dimensions in mm : Net Mass: 1.4 g
Fig.19. SOT428 : centre pin connected to mounting base.
MOUNTING INSTRUCTIONS
Dimensions in mm
Fig.20. SOT428 : soldering pattern for surface mounting
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Epoxy meets UL94 V0 at 1/8".
6.22 max
2.38 max
0.93 max
6.73 max
tab
0.3
0.5
10.4 max
0.5
0.8 max
(x2)
2.285 (x2)
seating plane
1.1
0.5 min
5.4
4 min
4.6
1
2
3
7.0
7.0
2.15
2.5
4.57
1.5
September 1997
6
Rev 1.000
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