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SBOS292A DECEMBER 2003 REVISED AUGUST 2004
www.ti.com
8
PIN CONFIGURATION
Top View
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
REF
IN
/REF
OUT
TEMP
IN
SDA
SCL
PRG
GND
D
V
SD
TEST
V
EXC
GND
A
V
SA
V
IN1
V
IN2
V
FB
V
OUT
V
SJ
PGA309
TSSOP
PIN DESCRIPTION
PIN
NAME
DESCRIPTION
1
VEXC
Bridge sensor excitation. Connect to bridge if linearization and/or internal reference for bridge excitation is to be used.
2
GNDA
Analog ground. Connect to analog ground return path for VSA. Should be same as GNDD.
3
VSA
Analog voltage supply. Connect to analog voltage supply. To be within 200mV of VSD.
4
VIN1
Signal input voltage 1. Connect to + or – output of sensor bridge. Internal multiplexer can change connection internally to
Front-End PGA.
5
VIN2
Signal input voltage 2. Connect to + or – output of sensor bridge. Internal multiplexer can change connection internally to
Front-End PGA.
6
VFB
VOUT feedback pin. Voltage feedback sense point for over/under-scale limit circuitry. When internal gain set resistors for the
output amplifier are used, this is also the voltage feedback sense point for the output amplifier. VFB in combination with VSJ
allows for ease of external filter and protection circuits without degrading the PGA309 VOUT accuracy. VFB must always be
connected to either VOUT or the point of feedback for VOUT, if external protection is used.
7
VOUT
Analog output voltage of conditioned sensor.
8
VSJ
Output amplifier summing junction. Use for output amplifier compensation when driving large capacitive loads
(> 100pF) and/or for using external gain setting resistors for the output amplifier.
9
TEST
Test/External Controller Mode pin. Pull to GNDD in normal mode.
10
VSD
Digital voltage supply. Connect to digital voltage supply. To be within 200mV of VSA.
11
GNDD
Digital ground. Connect to digital ground return path for VSD. Should be same as GNDA.
12
PRG
Single-wire interface program pin. UART-type interface for digital calibration of the PGA309 over a single wire. Can be
connected to VOUT for a three-lead (VS, GND, VOUT) digitally-programmable sensor assembly.
13
SCL
Clock input/output for Two-Wire, industry-standard compatible interface for reading and writing digital calibration and
configuration from external EEPROM. Can also communicate directly to the registers in the PGA309 through the Two-Wire,
industry-standard compatible interface.
14
SDA
Data input/output for Two-Wire, industry-standard compatible interface for reading and writing digital calibration and
configuration from external EEPROM. Can also communicate directly to the registers in the PGA309 through the Two-Wire,
industry-standard compatible interface.
15
TEMPIN
External temperature signal input. PGA309 can be configured to read a bridge current sense resistor as an indicator of bridge
temperature, or an external temperature sensing device such as diode junction, RTD, or thermistor. This input can be internally
gained by 1, 2, 4, or 8. In addition, this input can be read differentially with respect to VGNDA, VEXC, or the internal/external
VREF. There is also an internal, register-selectable, 7
μ
A current source (ITEMP) that can be connected to TEMPIN as an RTD,
thermistor, or diode excitation source.
16
REFIN/REFOUT
Reference input/output pin. As an output, the internal reference (selectable as 2.5V or 4.096V) is available for system use on
this pin. As an input, the internal reference may be disabled and an external reference can then be applied as the reference for
the PGA309.