參數(shù)資料
型號: PDUSBD12PWDH
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: nullUSB interface device with parallel bus
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PDSO28
文件頁數(shù): 18/35頁
文件大小: 838K
代理商: PDUSBD12PWDH
Philips Semiconductors
PDIUSBD12
USB interface device with parallel bus
Product data
Rev. 08 — 20 December 2001
18 of 35
9397 750 09238
Koninklijke Philips Electronics N.V. 2001. All rights reserved.
This command is useful for debugging purposes. Since it keeps track of every
transaction, the status information is overwritten for each new transaction.
See
Table 9
for bit allocation.
Fig 13. Read last transaction status register.
Table 9:
Bit
7
Read last transaction status register: bit allocation
Symbol
Description
PREVIOUS STATUS
NOT READ
previous status was read.
DATA 0/1 PACKET
A ‘1’ indicates the last successful received or sent packet
had a DATA1 PID.
SETUP PACKET
A ‘1’ indicates the last successful received packet had a
SETUP token (this will always read ‘0’ for IN buffers).
ERROR CODE
See
Table 10 “Error codes”
.
DATA
RECEIVE/TRANSMIT
SUCCESS
A ‘1’ indicates a second event occurred before the
6
5
4 to 1
0
A ‘1’ indicates data has been received or transmitted
successfully.
Table 10:
Error
code (Binary)
0000
0001
0010
0011
Error codes
Description
No Error
PID encoding Error; bits 7 to 4 are not the inversion of bits 3 to 0
PID unknown; encoding is valid, but PID does not exist
Unexpected packet; packet is not of the type expected (= token, data or
acknowledge), or SETUP token to a non-control endpoint
Token CRC Error
Data CRC Error
Time Out Error
Never happens
Unexpected End-Of-Packet
Sent or received NAK
Sent Stall, a token was received, but the endpoint was stalled
0100
0101
0110
0111
1000
1001
1010
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