參數(shù)資料
型號: PDIUSBH11ANB
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Universal Serial Bus Hub
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PDIP32
封裝: PLASTIC, SOT-232-1, SDIP-32
文件頁數(shù): 20/28頁
文件大小: 157K
代理商: PDIUSBH11ANB
Philips Semiconductors
Product specification
PDIUSBH11A
Universal Serial Bus Hub
1999 Jul 22
20
AC CHARACTERISTICS (AI/O pins, FULL speed)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
Driver characteristics
C
L
= 50 pF;
R
pu
= 1.5 k
on D+ to V
CC
Between 10% and 90%
Transition Time:
Rise time
Fall time
t
R
t
F
4
4
20
20
ns
ns
t
RFM
V
CRS
Rise/fall time matching
(t
R
/t
F
)
90
110
%
Output signal crossover voltage
1.3
2.0
V
Driver Timings
t
EOPT
t
DEOP
Source EOP width
Figure 1
160
175
ns
Differential data to EOP transition skew
Figure 1
–2
5
ns
Receiver Timings
Receiver Data Jitter Tolerance
To next transition
For paired transitions
EOP Width at Receiver
Must reject as EOP
Must accept
Characterized and not tested.
Guaranteed by design.
t
JR1
t
JR2
–18.5
–9
18.5
9
ns
ns
t
EOPR1
t
EOPR2
Figure 1
40
82
ns
ns
Hub Timings
Full Speed downstream port
t
HDD
t
SOP
t
EOPDR
t
HESK
Hub Differential Data Delay
Figure 2
40
Data bit width distortion after SOP
Figure 2
–5
3
ns
Hub EOP Delay Relative to t
HDD
Hub EOP Output Width Skew
Figure 3
0
15
Figure 3
–15
+15
AC CHARACTERISTICS (AI/O pins, LOW speed)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
Driver characteristics
C
L
= 50 pF and 350 pF;
R
pu
= 1.5 k
on D– to V
CC
Between 10% and 90%
C
L
= 50 pF
C
L
= 350 pF
Transition Time:
t
LR
Rise time
75
ns
ns
300
t
LF
Fall time
C
L
= 50 pF
C
L
= 350 pF
(t
R
/t
F
)
75
ns
ns
%
300
120
t
RFM
V
LCRS
Rise/fall time matching
80
Output signal crossover voltage
1.3
2.0
V
Driver Timings
t
LEOPT
t
LDEOP
Source EOP width
Figure 1
1.25
1.50
μ
s
ns
Differential data to EOP transition skew
Figure 1
–40
100
Receiver Timings
EOP Width at Receiver
Must reject as EOP
Must accept
Figure 1
t
LEOPR1
t
LEOPR2
Hub Timings
t
LHDD
t
LSOP
t
LEOPDR
t
LHESK
330
675
ns
ns
Low Speed downstream port
Hub Differential Data Delay
Figure 2
300
Data bit width distortion after SOP
Figure 2
–65
45
ns
Hub EOP Delay Relative to t
LHDD
Hub EOP Output Width Skew
Figure 3
0
200
Figure 3
–300
+300
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