參數(shù)資料
型號: PCS3P25811AG08SR
廠商: ON Semiconductor
文件頁數(shù): 2/9頁
文件大?。?/td> 0K
描述: IC CLOCK GEN 4-32MHZ 8-SOIC
標準包裝: 1
類型: *
PLL:
輸入: LVCMOS,晶體
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 無/無
頻率 - 最大: 32MHz
除法器/乘法器: 是/無
電源電壓: 2.8 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 標準包裝
其它名稱: PCS3P25811AG08SROSDKR
PCS3P25811, PCS3P25812, PCS3P25814
http://onsemi.com
2
Figure 1. Block Diagram
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Input Decoder
Phase
Detector
Loop
Filter
VCO
Output
Divider
PLL
XOUT
VDD
S1
XIN /CLKIN
ModOUT
VSS
& Modulation Control
S0
FSEL
Table 1. PIN DESCRIPTION
Pin #
Pin Name
Type
Description
1
XIN / CLKIN
Input
Crystal connection or External Clock input.
2
VSS
Power
Ground to entire chip.
3
S1
Input
Digital 3 level logic input (1M0) used to select Center, Down and No spread options.
(Refer to Frequency Deviation Selection Table). Default = M.
4
S0
Input
Digital 3 level logic input (1M0) used to select Center, Down and No spread options.
(Refer to Frequency Deviation Selection Table). Default = M.
5
ModOUT
Output
Spread Spectrum Clock Output.
6
FSEL
Input
Frequency range select. Digital 3 level logic input (1M0) used to select Input Clock
frequency range (Refer to Input/Output Frequency Range Selection Table). Default = M.
7
VDD
Power
Power supply for the entire chip (2.8 V to 3.6 V).
8
XOUT
Output
Crystal connection. If using an external reference, this pin must be left unconnected.
Table 2. OUTPUT FREQUENCY RANGE SELECTION
FSEL (pin 6)
Part Number
Modulation Rate
PCS3P25811 (1x)
PCS3P25812 (2x)
PCS3P25814 (4x)
Input (MHz) Output (MHz) Input (MHz) Output (MHz) Input (MHz) Output (MHz)
0
4 8
8 16
4 8
16 32
Input Frequency / 128
1
8 16
16 32
8 16
32 64
Input Frequency / 256
M
16 32
32 64
16 32
64 128
Input Frequency / 512
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