
make sure that the counter is not counting at the time - if it is, you
may read one byte from one count and the second byte from a
different count, possibly leading to serious errors. One way to avoid
this is to use the count latch command, which takes a snapshot of a
counter's contents. You must then read both bytes of the counter
register. Another way is to use the multiple latch command, which
can latch the count and status of all the counters in the chip.
The 8254 can work in six different modes. Each counter in the chip
is independent of the others, so each can be set up in a different
mode. The control register defines the mode (and other features) and
it must be programmed before the counter is used. The format of the
control register is as follows.
The count latch command is quite straightforward. The multiple
latch command has a different command word format, as follows:
Function
Always 1.
High in a multiple latch
Always 1.
High in a multiple latch
Latch count
This bit selects if counts are to be latched.
0 = latch counts. 1 = do not
Latch status
This bit selects if counter status data are to be latched.
0 = latch status. 1 = do not
counter 2
1 = select counter 2. 0 = do not.
counter 1
1 = select counter 1. 0 = do not.
counter 0
1 = select counter 0. 0 = do not.
this bit is always 0
After issuing a multiple latch command you must read the data
back. If you only latched status, you only need to read one byte for
each counter latched. If you latched counts you must read two bytes
(lower then upper). If you latched both then you must read three
bytes back for each counter selected. In this case the status is the first
of the three. The format of the count data is simply the two count
bytes. The format of the status is as follows:
J230 PCPIC
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Bit
7
6
Name
Function
Comments
Bit
7
6
5
Name
Comments
SC1
SC0
select counter
select counter
These bits select which counter to program
10 = counter 2, 01= counter 1, 00 = counter 0.
If both these bits are high, this is a multiple latch
command (See below).
5
RWM1
read/write method
These two bits select how counter values are read and
written.
Use 11= lower byte then higher. If these two bits and all
the less-significant ones are 0 ( and it’s not a multiple
latch command) this is a ‘count latch’ command which
latches the selected counter so that its count can be
read while it is still counting.
4
RWM0
read/write method
3
2
1
0
CM2
CM1
CM0
counter mode
counter mode
counter mode
These three bits set up the counter mode. For example ,
101 = mode 5, 011 = mode 3.
BCD
If this bit is high the counter is a 4 digit BCd counter. If
low it is a 16-bit binary counter. Use the later.
SC1
SC0
COUNT
4
STATUS
3
2
1
0
C2
C1
C0