參數資料
型號: PCM4104PFBT
英文描述: High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter
中文描述: 高性能24位,216kHz的采樣,四通道音頻數字模擬轉換器
文件頁數: 24/36頁
文件大?。?/td> 486K
代理商: PCM4104PFBT
$%
SBAS291C AUGUST 2003 REVISED DECEMBER 2004
www.ti.com
24
SOFTWARE MODE CONFIGURATION
Software mode is selected by forcing the MODE input
(pin 8) high. Software mode operation provides full access
to the features of the PCM4104 by allowing the writing and
reading of on-chip control registers. This is accomplished
using the four-wire SPI port. The following paragraphs
provide a brief description of each function available when
using Software mode.
Digital Attenuation
The audio signal for each channel can be attenuated in the
digital domain using this function. Attenuation settings
from 0dB (unity gain) to 119.5dB are provided in 0.5dB
steps. In addition, the attenuation level may be set to the
mute state. The rate of change for the digital attenuation
function is one 0.5dB step for every eight LRCK periods.
Each channel has its own independent attenuation control,
accessed using control registers 1 through 4. The reset
default setting for all channels is 0dB, or unity gain (no
attenuation applied).
Digital De-Emphasis
The de-emphasis function is accessed through Control
Register 5 using the DEM[1:0] bits. The reset default
setting is that the de-emphasis is disabled for all four
channels. De-emphasis filter operation is described in the
Standalone Mode Configuration section of this data sheet.
Soft Mute
Each of the four D/A converter channels has its own
independent soft mute control, located in Control Register
5.
The reset default is normal output for all four channels with
the soft mute function disabled. The MUTE input (pin 10)
also functions in Software mode, with a high input forcing
soft mute on all four channels.
Zero Data Mute
The PCM4104 includes a zero data detection and mute
function in Software mode. This function automatically
mutes a given channel when 1024 consecutive LRCK
periods of all zero data are detected for that channel. The
zero data mute function is enabled and disabled using the
ZDM bit in Control Register 5. The zero data mute function
is disabled by default on power up or reset.
Output Phase Reversal
The PCM4104 includes an output phase reversal function,
which provides the ability to invert the output phase for all
four channels, either for testing or for matching various
output circuit configurations. This function is controlled
using the PHASE bit, located within Control Register 5.
The output phase is set to noninverted by default on power
up or reset.
Sampling Mode
Sampling mode configuration was discussed earlier in this
data sheet, with Table 1 providing a reference for common
sampling and system clock frequencies. The FS0 and FS1
bits located in Control Register 6 are used to set the
sampling mode. The sampling mode defaults to Single
Rate on power up or reset.
Power-Down Modes
The power-down control bits are located in Control
Register 6. These bits are used to power down pairs of D/A
converters within the PCM4104. The PDN12 bit is used to
power down channels 1 and 2, while the PDN34 bit is used
to power down channels 3 and 4. When a channel pair is
powered down, it ignores the audio data inputs and sets its
outputs to a high-impedance state. By default, the
power-down bits are disabled on power up or reset.
Software Reset
This reset function allows a reset sequence to be initiated
under software control. All control registers are reset to
their default state. The reset bit, RST, is located in Control
Register 6. Setting this bit to 1 initiates a one-time reset
sequence. The RST bit is cleared by the initialization
sequence.
Audio Data Formats, LRCK Polarity, and BCK
Sampling Edge
Control Register 7 is used to configure the PCM4104 audio
serial port. Audio serial port operation was discussed
previously in this data sheet; refer to that section for more
details regarding the functions controlled by this register.
The control register definitions provide additional
information regarding the register functions and their
default settings.
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