參數(shù)資料
型號(hào): PCM4104PFBR
英文描述: High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter
中文描述: 高性能24位,216kHz的采樣,四通道音頻數(shù)字模擬轉(zhuǎn)換器
文件頁(yè)數(shù): 22/36頁(yè)
文件大?。?/td> 486K
代理商: PCM4104PFBR
$%
SBAS291C AUGUST 2003 REVISED DECEMBER 2004
www.ti.com
22
Slot 1
Slot 2
Slot 3
Slot 4
Ch. 1
Ch. 2
Ch. 3
Ch. 4
In the case of BCK = 96f
S
, each time slot is 24 bits long and contains the 24bit audio data for the corresponding channel.
In the case of BCK = 128f
, each time slot is 32 bits long and contains the 24bit audio data for the corresponding channel.
The audio data is left justified in the time slot, with the the least significant 8 bits of each time slot being
don
t care
bits.
Audio data is always presented in two’s complement, MSBfirst format.
LRCK
Normal, Zero BCK Delay
LRCK
Normal, One BCK Delay
LRCK
Inverted, Zero BCK Delay
LRCK
Inverted, One BCK Delay
DATA0
Supports 4 Channels, or
one PCM4104 device.
One Frame
BCK = 96f
or 128f
(the SUB pin is ignored when using a Short Frame)
TDM Data Formats
Short Frame
All Sampling Modes Supported
Figure 14. TDM Data Formats: Short Frame
LRCK
BCK
(BCKE = 0)
DATA0
t
DS
t
DH
t
LRBKD
t
LRCKP
t
BNF
t
BKBF
One Frame
BCK
(BCKE = 1)
PARAMETER
DESCRIPTION
MIN
MAX
UNITS
1/f
BCK
12
1/f
BCK
12
10
10
ns
ns
ns
ns
ns
ns
t
LRCKP
t
LRBKD
t
DS
t
DH
t
BNF
t
BKBF
LRCK pulse width
LRCK active edge to BCK sampling edge delay
Data setup time
Data hold time
LRCK transition before new frame
BCK sampling edge to new frame delay
Figure 15. TDM Timing
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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