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參數(shù)資料
| 型號： | PCM1870RHFT |
| 英文描述： | 16-Bit Low-Power Stereo Audio ADC With Microphone Bias and Microphone Amplifier |
| 中文描述： | 16位低功耗立體聲音頻ADC，具有麥克風偏置和麥克風放大器 |
| 文件頁數(shù)： | 14/49頁 |
| 文件大?。?/td> | 648K |
| 代理商： | PCM1870RHFT |
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PCM1870
SLAS544–MAY 2007
Table 3. Recommended Power-On Sequence
REGISTER
SETTINGS
—
5102
H
5A00
H
4980
H
5601
H
4A01
H
523F
H
5711
H
4F0C
H
500C
H
STEP
NOTE
1
2
3
4
5
6
7
8
9
10
Turn ON all power supplies
(1)
ADC audio interface format (left-justified)
(2)
PG1, PG2 gain control (0 dB)
Analog bias power up
Zero-cross detection enable
V
COM
power up
Analog front end (ADL, ADR, D2S, MCB, PG1, 2, 5, 6) power up
Analog input (MUX3, MUX4) select. Analog input (MUX1, MUX2) select
Analog input L-ch (PG3) volume (0 dB)
(3)
Analog input R-ch (PG4) volume (0 dB)
(3)
(1)
V
should be turned on first or at the same time with other power supplies. It is recommended to set the register data after turning on
all power supplies and while the system clock is running.
The audio interface format should be set to match the DSP or decoder being used.
Any level is acceptable for volume or attenuation. The level should return to that recorded in the register data when system was last
powered off.
(2)
(3)
Table 4. Recommended Power-Off Sequence
REGISTER
SETTINGS
5132
H
5200
H
4A00
H
4900
H
—
STEP
NOTE
1
2
3
4
5
ADC L-ch/R-ch digital soft mute enable, ADC audio interface format (left-justified)
(1)
Analog front end (ADL, ADR, D2S, MCB, PG1, 2, 5, 6) power down
V
COM
power down
Analog bias power down
Turn OFF all power supplies.
(2)
(1)
(2)
The audio interface format should be set to match the DSP or decoder being used.
Power-supply sequencing is not required. It is recommended to make the required register settings while the system clock is running,
then turn off all power supplies.
14
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