參數(shù)資料
型號： PCM1807PWR
英文描述： Single-Ended, Analog-Input 24-Bit, 96-kHz Stereo A/D Converter
中文描述： 單端模擬輸入24位，96千赫立體聲A / D轉(zhuǎn)換器
文件頁數(shù)： 21/29頁
文件大?。?/td> 426K
代理商： PCM1807PWR
www.ti.com
SYSTEM RESET
T0084-01
48/f
in
or 48/f
S
Fade-In Start
Fade-In Complete
DOUT
DOUT
(Contents)
Reset: t
(RST)
Reset Release: t
(REL)
Zero Data
SCKI
SRST
Internal
Reset
Normal Data
Normal Data
Normal Data
BPZ
PCM1807
SLES147–SEPTEMBER 2005
The SRST bit controls the entire ADC operation except fade-out. DOUT is forced to zero immediately and the
PCM1807 goes into power-down state. Also, all registers except the mode control register are reset once. The
PCM1807 minimizes power dissipation during the power-down state. When the PCM1807 powers up, the digital
output is valid after the reset state is released and the time of 1024 SCKI + 8960/f
has elapsed. Because the
fade-in operation is performed, it takes additional time of 48/f
in
or 48/f
S
until the level corresponding to the analog
input signal is obtained.
Figure 27
illustrates DOUT behavior during the power-down and power-up sequences by
SRST.
SYMBOL
t
(RST)
t
(REL)
PARAMETER
MIN
MAX
UNIT
μ
s
μ
s
Delay time from SCKI resume to reset release
Delay time from reset release to DOUT output
1024 SCKI
8960/f
S
Figure 27. Power-Up/Power-Down Sequence by SRST
Table 8. System Reset Control
SRST
0
1
SYSTEM RESET
System reset
Normal operation (default)
21
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PCM1807 Single-Ended, Analog-Input 24-Bit, 96-kHz Stereo A/D Converter
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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