參數(shù)資料
型號: PCM1804DBR
英文描述: FULL DIFFERENTIAL ANALOG INPUT 24-BIT, 192-kHz STEREO A/D CONVERTER
中文描述: 全差分模擬輸入24位,192千赫立體聲A / D轉(zhuǎn)換器
文件頁數(shù): 27/31頁
文件大小: 470K
代理商: PCM1804DBR
PCM1804
SLES022A
DECEMBER 2001
27
www.ti.com
PRINCIPLES OF OPERATION
typical circuit connection diagram (continued)
Figure 43 illustrates a typical circuit connection diagram in the DSD data format operation.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
VREFL
AGNDL
VCOML
VINL+
VINL
FMT0
FMT1
S/M
OSR0
OSR1
OSR2
BYPAS
DGND
VDD
VREFR
AGNDR
VCOMR
VINR+
VINR
AGND
VCC
OVFL
OVFR
RST
SCKI
LRCK/DSDBCK
BCK/DSDL
DATA/DSDR
27
26
25
24
23
22
21
20
19
18
17
16
15
+
C1
+
C3
+
C5
+
L-Channel In
Format [1:0]
Master/Slave
Oversampling
Ratio [2:0]
HPF Bypass
3.3 V
C2
+
C4
+
+
C6
5 V
Control
+
R-Channel In
Overflow
Reset
System Clock
Data Clock
L-Channel Data Out
Audio Data
Processor
PCM1804
R-Channel Data Out
NOTES: A. C1, C2, C5, and C6: Bypass capacitor 0.1-
μ
F ceramic and 10-
μ
F tantalum, depends on layout and power supply.
B. C3, C4: Bypass capacitor 0.1-
μ
F tantalum, depends on layout and power supply.
Figure 43. Typical Circuit Connection Diagram at DSD
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