參數(shù)資料
型號: PCM1801U
英文描述: 16-Bit, Stereo, Audio ANALOG-TO-DIGITAL CONVERTER
中文描述: 16位,立體聲,音頻模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 13/13頁
文件大小: 101K
代理商: PCM1801U
13
PCM1801
FIGURE 6. ADC Output for Power-On Reset and RSTB Control.
FIGURE 7. ADC Output for Loss of Synchronization.
1
2
3
4
5
6
7
V
IN
L
V
IN
R
DGND
V
DD
SCKI
BCK
LRCK
V
REF
1
V
REF
2
AGND
V
CC
FMT
BYPAS
DOUT
14
13
12
11
10
9
8
System Clock
Data Clock
Latch Enable
Data Out
+
C
1(1)
+
C
2(1)
C
3(2)
+
C
6(3)
+
C
5(3)
C
4(2)
0V
+5V
Format
Bypass
Audio Data
Processor
Pin Program
or Control
Lch IN
Rch IN
NOTES: (1) C
and C
: A 1
μ
F capacitor gives 5.3Hz (
τ
= 1
μ
F * 30k
) cut-off frequency for input HPF
in normal operation and requires power-on setting time of 6ms at power up.
(2) C
3
and C
4
: Bypass capacitor 0.1
μ
F ceramic and 10
μ
F tantalum or aluminum electrolytic, depending on layout and power supply.
(3) C
5
and C
6
: 4.7
μ
F tantalum or aluminum electrolytic capacitor.
FIGURE 8. Typical Circuit Connection.
Reset
Ready/Operation
Internal Reset
DOUT
Zero Data
Normal Data
(1)
18436/f
S
Reset Release
Power ON
NOTE: (1) The HPF transient response (exponentially attenuationed signal from
±
0.2% DC of FSR
with 200ms time constant) appears initially.
Synchronous
Asynchronous
Synchronization
Lost
Resynchronization
1/f
S
Synchronous
Normal
Normal
(2 )
Zero Data
32/f
S
Undefined Data
State of
Synchronization
DOUT
(1 )
NOTES: (1) Applies only for Slave Mode—the loss of synchronization never occurs in Master Mode.
(2) The HPF transient response (exponentially attenuationed signal from
±
0.2% DC of FSR
with 200ms time constant) appears initially.
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