參數(shù)資料
型號: PCM1750P
英文描述: Dual CMOS 18-Bit Monolithic Audio ANALOG-TO-DIGITAL CONVERTER
中文描述: 雙通道CMOS 18位單片音頻模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 15/18頁
文件大?。?/td> 240K
代理商: PCM1750P
15
PCM1750
The PCM1750 is sensitive to supply voltages outside the
absolute maximum ratings shown in the specification tables.
Do not exceed –8V on the negative supplies at any time or
irreversible damage may occur. Note the 10
resistors in
series with each –5V supply line (shown in Figure–7) to help
protect the part from severe damage if the supplies are over-
ranged momentarily.
Grounding Requirements
Because of the high resolution and linearity of the PCM1750,
system design problems such as ground path resistance and
contact resistance become very important.
The ACOM and DCOM pins are separated internally on the
PCM1750. To eliminate unwanted ground loops, all com-
mons (both analog and digital) should be connected to the
same low-impedance ground plane. This should be an ana-
log ground plane separate from other high-frequency digital
ground planes on the same board. If the analog and digital
commons of the PCM1750 are connected to different ground
planes, care should be taken to keep them within 0.6V of
each other to insure proper operation of the converter.
A ground plane is usually the best solution for preserving
dynamic performance and reducing noise coupling into
sensitive converter circuits. Where any compromises must
be made, the common return of the analog input signals
should be referenced to the ACOM pins. This will prevent
voltage drops in the power supply returns from appearing in
series with the input signal.
Coupling between analog input and digital lines should be
minimized by careful layout. For instance, if the lines must
cross, they should do so at right angles. Parallel analog and
digital lines should be separated from each other by a pattern
connected to common.
If external MSB and offset adjust potentiometers are used,
the potentiometers and related resistors should be located as
close to the PCM1750 as possible.
Minimizing “Glitches”
Coupling of external transients into an analog-to-digital
converter can cause errors which are difficult to debug. Care
should be taken to avoid glitches during critical times in the
sampling and conversion process. Since the PCM1750 has
an internal sample/hold function, the signal that switches it
into the HOLD state (CONVERT going HIGH) is critical, as
it would be on any sample/hold amplifier. The CONVERT
rising edge should have minimal ringing, especially during
the 20ns after it rises.
APPLICATIONS
USING A DIGITAL FILTER
A 4
x
decimation filter is available for the PCM1750 called
the DF1750. It is available in a 28-pin DIP or a 40-pin SOIC
package. The use of this filter greatly eases the implementa-
tion of the PCM1750 in audio band applications.
10μF
+
18
1/2 5532
10μF
+
25
1/2 5532
VREF
INL
2.75V
VREF
INR
2.75V
MC1403
+5V
2.5V
+
1μF
24
VREF
OUTL
+
1μF
19
VREF
OUTR
+
1μF
+
1μF
909
909
1k
1k
10k
10k
3
1
2
0.1μF
26.36k
1/2 5532
1/2 5532
10k
REF102
+15
10μF
+
18
10μF
+
25
VREF
INL
2.75V
VREF
INR
2.75V
+
1μF
24
VREF
OUTL
+
1μF
19
VREF
OUTR
6
8
10V
4
2
+
1μF
FIGURE 8b. External Reference Circuit Using Standard
2.5V Reference.
FIGURE 8c. Low Noise, Low Drift External Reference
Circuit.
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