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參數(shù)資料
| 型號： | PCM1748KE |
| 英文描述： | 24-Bit, 96kHz Sampling Enhanced Multilevel, Delta-Sigma, Audio DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 24位，96kHz采樣加強多層次，Δ-Σ，音頻數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 10/22頁 |
| 文件大小： | 323K |
| 代理商： | PCM1748KE |
PCM1748
SBAS165
10
FIGURE 5. Control Data Word Format for MDI.
FIGURE 6. Register Write Operation.
SERIAL CONTROL INTERFACE
The serial control interface is a 3-wire serial port that
operates asynchronously to the serial audio interface. The
serial control interface is utilized to program the on-chip
mode registers. The control interface includes MD (pin 13),
MC (pin 14), and ML (pin 15). MD is the serial data input,
used to program the mode registers; MC is the serial bit
clock, used to shift data into the control port; and ML is the
control port latch clock.
REGISTER WRITE OPERATION
All Write operations for the serial control port use 16-bit
data words. Figure 5 shows the control data word format.
The most significant bit must be a “0”. There are seven bits,
labeled IDX[6:0], that set the register index (or address) for
the Write operation. The least significant eight bits, D[7:0],
contain the data to be written to the register specified by
IDX[6:0].
Figure 6 shows the functional timing diagram for writing the
serial control port. ML is held at a logic “1 ” state until a
register needs to be written. To start the register write cycle,
ML is set to logic “0”. Sixteen clocks are then provided on
MC, corresponding to the 16 bits of the control data word on
MD. After the sixteenth clock cycle has completed, ML is
set to logic “1” to latch the data into the indexed mode
control register.
CONTROL INTERFACE TIMING REQUIREMENTS
Figure 7 shows a detailed timing diagram for the serial
control interface. These timing parameters are critical for
proper control port operation.
FIGURE 4. Audio Interface Timing.
SYMBOL
PARAMETER
MIN
MAX
UNITS
t
BCY
t
BCH
t
BCL
t
BL
t
LB
t
DS
t
DH
BCK Pulse Cycle Time
BCK High Level Time
BCK Low Level Time
BCK Rising Edge to LRCK Edge
LRCK Falling Edge to BCK Rising Edge
DATA Set Up Time
DATA Hold Time
32, 48, or 64f
S(1)
35
35
10
10
10
10
ns
ns
ns
ns
ns
ns
NOTE: (1) f
S
is the sampling frequency (e.g., 44.1kHz, 48kHz, 96kHz, etc.)
LRCK
BCK
DATA
50% of V
DD
50% of V
DD
50% of V
DD
t
BCH
t
BCL
t
LB
t
BL
t
DS
t
DH
t
BCY
IDX5
IDX6
0
IDX4
IDX2
IDX3
IDX1
IDX0
D7
D6
D5
D4
D3
D2
D1
D0
MSB
Register Index (or Address)
Register Data
LSB
0
D7
D6
D5
D4
D3
D2
0
IDX6
D1
D0
X
X
X
IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0
ML
MC
MDI
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相關代理商/技術(shù)參數(shù) |
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| PCM1748KE/2K | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1748KE/2KG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1748KEG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM-175 | 功能描述:電線鑒定 Pre-Printed WM Card, Vinyl Cloth, .22" W RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
| PCM175/100 G | 制造商:Fibox 功能描述:Bulk |
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