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參數(shù)資料
| 型號： | PCM1721 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Stereo Audio Digital-To-Analog Converter With Programmable PLL(帶可編程PLL立體聲音頻D\A轉(zhuǎn)換器) |
| 中文描述： | 立體聲音頻數(shù)字模擬轉(zhuǎn)換器（帶可編程鎖相環(huán)立體聲音頻?\\阿轉(zhuǎn)換器，具有可編程鎖相環(huán)） |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 227K |
| 代理商： | PCM1721 |
7
PCM1721
DAC Section
System Clock Input
System Clock Input
for DAC Section
27MHz Master
Clock Input
PLL Generated
System Clock Out
Frequency
Selection ROM
Phase Detector
and Loop Filter
VCO
Sampling Frequency Selection
256f
S
/384f
S
Selection
N Counter
M Counter
4
1
2
TYPICAL CONNECTION DIAGRAM
Figure 1 illustrates the typical connection diagram for
PCM1721 in a MPEG2 application. The 27MHz master
video clock (f
M
) drives MCKI (pin 1) of PCM1721. A
programmable system clock is generated by the PCM1721
PLL, with SCKO used to drive the MPEG2 decoder’s
system clock input. The standard audio signals (data, bit
clock, and word clock) are generated in the decoder from
PCM1721’s system clock, providing synchonization of au-
dio and video signals.
PLL CIRCUIT
PCM1721 has a programmable internal PLL circuit, as
shown in Figure 2. The PLL is designed to accept a 27MHz
master clock and generate all internal system clocks required
to operate the digital filter and
Σ
modulator, either at 256f
S
or 384f
S
. The PLL will directly track any variations in the
master clock’s frequency, and jitter on the system clock is
specified at 250ps maximum. Figure 3 illustrates the timing
requirements for the 27MHz master clock.
FIGURE 1. External Master Clock Input.
FIGURE 2. PPL Block Diagram.
FIGURE 3. MCKI, SCKI Input Timing.
t
CH
1/27MHz or
1/256f
S
or 1/384f
S
t
CL
2.0V
0.8V
t
CH
: 13ns (min)
t
CL
: 13ns (min)
DIN
BCKIN
LRCIN
SCKO
SCKI
SERO
SCKO
LRCKO
SYSCKI
MCKIN
TEST
17
16
18
2
4
6
7
8
9
ML
MC
MD
RSTB
14
23
22
21
3
11
15
10
1
19
27MHz CLK OUT
+10μF
Post
LPF
Post
LPF
Analog
Mute
Analog
Mute
STRB
SCKO
SDO
PIO
System
Controller
Rch Analog Out
Lch Analog Out
12
13
Audio
Decoder
256f
S
/384f
S
CLK
AGND
PGND DGND
V
CC
+5V Analog
+5V Analog
V
DD
V
CP
V
OUT
L
V
OUT
R
ZERO
CAP
PCM1721
Master
PLL
SCR
(1)
or
PCR
NOTE: (1) SCR: System Clock Reference
PCR: Program Clock Reference
200
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCM1723 | 制造商:BB 制造商全稱:BB 功能描述:Stereo Audio DIGITAL-TO-ANALOG CONVERTER WITH PROGRAMMABLE PLL |
| PCM1723E | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Ster DAC w/Prog PLL RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1723E/2K | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Ster DAC w/Prog PLL RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1723E/2KG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Ster DAC w/Prog PLL RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1723EG | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
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