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參數(shù)資料
| 型號： | PCM1720 |
| 英文描述： | Stereo Audio DIGITAL-TO-ANALOG CONVERTER MPEG2/AC-3 COMPATIBLE |
| 中文描述： | 立體聲音頻數(shù)字模擬轉(zhuǎn)換器MPEG2/AC-3兼容 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 194K |
| 代理商： | PCM1720 |
PCM1720
7
TYPICAL CONNECTION DIAGRAM
Figure 4 illustrates the typical connection diagram for
PCM1720 used in a stand-alone application.
SYSTEM CLOCK
The system clock for PCM1720 must be either 256f
S
or
384f
S
, where f
S
is the audio sampling frequency (LRCIN),
typically 32kHz, 44.1kHz or 48kHz. The system clock is
used to operate the digital filter and the noise shaper. The
system clock input (SCKI) is at pin 2.
PCM1720 has a system clock detection circuit which auto-
matically detects the frequency, either 256f
S
or 384f
S
. The
system clock should be synchronized with LRCIN (pin 16),
but PCM1720 can compensate for phase differences. If the
phase difference between LRCIN and system clock is greater
than
±
6 bit clocks (BCKIN), the synchronization is per-
formed automatically. The analog outputs are forced to a
bipolar zero state (V
CC
/2) during the synchronization func-
tion. Table I shows the typical system clock frequency
inputs for the PCM1720.
FIGURE 4. Typical Connection Diagram.
SAMPLING
RATE (LRCIN)
SYSTEM CLOCK
FREQUENCY (MHz)
256f
S
384f
S
32kHz
8.192
12.288
44.1kHz
11.2896
16.9340
48kHz
12.288
18.432
TABLE I. System Clock Frequencies vs Sampling Rate.
SPECIAL FUNCTIONS
PCM1720 includes several special functions, including digi-
tal attenuation, digital de-emphasis, soft mute, data format
selection and input word resolution. These functions are
controlled using a three-wire interface. MD (pin 6) is used
for the program data, MC (pin 5) is used to clock in the
program data, and ML (pin 4) is used to latch in the program
data. Table II lists the selectable special functions.
FUNCTION
Input Audio Data Format Selection
Normal Format
I
2
S Format
DEFAULT MODE
Normal Format
Input Audio Data Bit Selection
16/20/24 Bits
16 Bits
Input LRCIN Polarity Selection
Lch/Rch = High/Low
Lch/Rch = Low/High
Lch/Rch = High/Low
De-emphasis Control
OFF
Soft Mute Control
OFF
Attenuation Control
Lch, Rch Individually
Lch, Rch Common
0dB
Lch, Rch Individually Fixed
Infinite Zero Detection Circuit Control
OFF
Operation Enable (OPE)
Enabled
Sample Rate Selection
Internal System Clock Selection
256f
S
384f
S
Sampling Frequency
44.1kHz Group
48kHz Group
32kHz Group
384f
S
44.1kHz
Analog Output Mode
L, R, Mono, Mute
Stereo
TABLE II. Selectable Functions.
DIN
BCKIN
LRCIN
SCKI
15
14
16
2
4
5
6
7
ML
MC
MD
RSTB
12
13
20
19
9
8
10
11
PCM
Audio Data
Processor
256f
S
/384f
S
CLK
AGND
DGND
V
CC
+5V Analog
+5V Analog
V
DD
V
OUT
L
CAP
V
OUT
R
ZERO
PCM1720
+10μF
Post
LPF
Post
LPF
Analog
Mute
Analog
Mute
STRB
SCKO
SDO
PIO
System
Controller
Rch Analog Out
Lch Analog Out
200
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