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參數(shù)資料
| 型號： | PCM1716 |
| 英文描述： | 24-Bit, 96kHz Sampling CMOS Delta-Sigma Stereo Audio DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 24位，96kHz采樣的CMOSΔ-Σ立體聲音頻數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 222K |
| 代理商： | PCM1716 |
10
PCM1716
REGISTER
NAME
BIT
NAME
DESCRIPTION
Register 0
AL (7:0)
LDL
A (1:0)
res
DAC Attenuation Data for Lch
Attenuation Data Load Control for Lch
Register Address
Reserved, should be “L”
Register 1
AR (7:0)
LDR
A (1:0)
res
DAC Attenuation Data for Rch
Attenuation Data Load Control for Rch
Register Address
Reserved, should be “L”
Register 2
MUT
DEM
OPE
IW (1:0)
res
A (1:0)
res
Left and Right DACs Soft Mute Control
De-emphasis Control
Left and Right DACs Operation Control
Input Audio Data Bit and Format Select
Reserved
Register Address
Reserved, should be “L”
Register 3
I
2
S
LRP
ATC
SRO
REV
CKO
SF (1:0)
IZD
A (1:0)
res
Audio Data Format Select
Polarity of LRCIN Select
Attenuator Control
Slow Roll-Off Select
Output Phase Select
CLKO Output Select
Sampling Rate Select
Internal Zero Detection Circuit Control
Register Address
Reserved, should be “L”
TABLE VII. Register Functions
REGISTER 0 (A1 = 0, A0 = 0)
B15 B14 B13 B12 B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
res
res res res
res A1 A0 LDL AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0
Register 0 is used to control left channel attenuation. Bits
0 - 7 (AL0 - AL7) are used to determine the attenuation
level. The level of attenuation is given by:
ATT = 0.5 x (data-255) (dB)
FFh = –0dB
FEh = –0.5dB
:
:
01h = –127.5dB
00h = –
∞
(= Mute)
ATTENUATION DATA LOAD CONTROL
Bit 8 (LDL) is used to control the loading of attenuation data
in B0:B7. When LDL is set to 0, attenuation data will be
loaded into AL0:AL7, but it will not affect the attenuation
level until LDL is set to 1. LDR in Register 1 has the same
function for right channel attenuation.
REGISTER 1 (A1 = 0, A0 = 1)
B15 B14 B13 B12 B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
res
res res res
res A1 A0 LDR AR7 AR6 AR5AR4 AR3AR2 AR1 AR0
Register 1 is used to control right channel attenuation. As
in Register 1, bits 0 - 7 (AR0 - AR7) control the level of
attenuation.
Register 2 is used to control soft mute, de-emphasis, opera-
tion enable, input resolution, and input audio data bit and
format.
REGISTER 2 (A1 = 1, A0 = 0)
B15 B14 B13 B12 B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
res
res res res
res A1 A0 res
res res res
IW1 IWO OPE DEM MUTE
when OPE (B2) is “HIGH”, the output of the DAC will be
forced to bipolar zero, irrespective of any input data.
IWO (B3), IW1 (B4) and I
2
S (B0) of Register 3
These resisters, IWO, IW1, I
2
S determine the input data
word and input data format as shown below.
IW1
IW0
I
2
S
Audio Interface
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
16-Bit Standard (Right-Justified)
20-Bit Standard (Right-Justified)
24-Bit Standard (Right-Justified)
24-Bit Left-Justified (MSB First)
16-Bit I
2
S
24-Bit I
2
S
Reserved
Reserved
REGISTER 3 (A1 = 1, A0 = 1)
B15 B14 B13 B12 B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
res
res res res
res A1 A0
IZD
SF1 SF0 CKO REV SRO ATC LRP
I
2
S
REGISTER 3 (A1 = 1, A0 = 1)
Register 3 is used to control input data format and polarity,
attenuation channel control, system clock frequency, sam-
pling frequency, infinite zero detection, output phase,
CLKO output, and slow roll-off.
Bit 8 is used to control the infinite zero detection function
(IZD).
When IZD is “LOW”, the zero detect circuit is off. Under
this condition, no automatic muting will occur if the input
is continuously zero. When IZD is “HIGH”, the zero detect
feature is enabled. If the input data is continuously zero for
65, 536 cycles of BCKIN, the output will be immediately
MUT (B0)
MUT = L
Soft Mute OFF
MUT = H
Soft Mute ON
OPE (B2)
OPE = L
Normal Operation
OPE = H
DAC Operation OFF
DEM (B1)
DEM = L
De-emphasis OFF
DEM = H
De-emphasis ON
相關(guān)PDF資料 |
PDF描述 |
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| PCM1717 | Stereo Audio DIGITAL-TO-ANALOG CONVERTER |
| PCM1717E | Stereo Audio DIGITAL-TO-ANALOG CONVERTER |
| PCM1718 | Stereo Audio DIGITAL-TO-ANALOG CONVERTER |
| PCM1718E | Stereo Audio DIGITAL-TO-ANALOG CONVERTER |
| PCM1719 | Stereo Audio DIGITAL-TO-ANALOG CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCM1716E | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 96kHz Smplg CMOS D-S Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1716E | 制造商:Texas Instruments 功能描述:24BIT DAC CMOS STEREO SMD 1716 |
| PCM1716E/2K | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 96kHz Smplg CMOS D-S Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1716E/2KG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 96kHz Smplg CMOS D-S Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1716E-3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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