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參數(shù)資料
| 型號(hào)： | PCM1712U |
| 英文描述： | DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 數(shù)字到模擬轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大?。?/td> | 101K |
| 代理商： | PCM1712U |
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11
PCM1712
FUNCTION MODE SELECTION
B0
B1
B2
BIT NO.
FLAG
MODE
BIT VALUE
SELECTED FUNCTION
DEFAULT
B3
B4
DEEM2
DEEM1
Sampling Frequency
for De-emphasis
44.1kHz
Mode
1
1
0
0
B5
IIR
De-emphasis
0
1
0
1
0
1
De-emphasis OFF
De-emphasis ON
Mute OFF
Mute ON
Double-speed OFF
Double-speed ON
B6
MUTE
Mute
B7
DSD
Double-Speed
B3
Not Assigned
B4
Not Assigned
Mode
2
1
0
1
B5
Not Assigned
B6
LRPL
Polarity for LRCI
0
1
0
1
Lch:high/Rch:low
Lch:low/Rch:high
Normal
IIS
B7
IIS
Input Format
MODE 1 CONTROLS
This mode can be enabled with the sequence of 1, 0, 0 as the
first three bits on MD (pin 26). This mode allows for the
following functions:
De-emphasis
De-emphasis Frequency
Soft Mute
Double-Speed Dubbing
On/Off
32kHz, 44.1kHz, 48kHz
On/Off
On/Off
DIGITAL DE-EMPHASIS
PCM1712 allows three different sampling rates for digital
de-emphasis. B3 and B4 are used for binary control of the
de-emphasis frequency:
B3
B4
FREQUENCY
0
0
1
1
0
1
0
1
OFF
48kHz
32kHz
44.1kHz
Once the reset has been established on pin 27 (MC), the de-
emphasis frequency defaults to 44.1kHz. B5 can be used to
override B3 and B4; a logic low on B5 disables de-emphasis,
and a logic high on B5 forces de-emphasis at 44.1kHz.
SOFT MUTE
Soft mute is enabled when B6 is high. The soft mute occurs
gradually, unlike the forced infinite zero detection. When
the mute data bit is high, complete muting will occur in
127/fs seconds.
DEEM2
0
1
DEEM1
0
1
48kHz
44.1kHz
32kHz
MODE
TABLE VII. Serial-Mode Control Input Format (MODE: H, Pin 24).
MODE BY
FIGURE 5. Mode Control Input Format, Serial Mode.
OFF
OFF
OFF
Lch:HIGH
Rch:LOW
Normal
L
H
H
ML
Alternation
Mode
Mode 1
ATT_DATA
Mode 2
Bit#
MC
D6
L
L
D5
L
H
D4
DEEM2
D3
DEEM1
D2
IIR
D1
MUTE
LRPL
D0
DSD
IIS
B0
B1
B2
B4
B5
B6
B7
B3
MD
(NOTE: Cycle Time for Model Control—Cycle time for mode control must be set over 192 times of minimum system clock.)
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