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參數(shù)資料
| 型號： | PCM1710 |
| 英文描述： | Stereo Audio DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 立體聲音頻數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 192K |
| 代理商： | PCM1710 |
PCM1710U
12
Once the reset has been established on pin 27 (MC), the de-
emphasis frequency defaults to 44.1kHz. B5 is a master
control for de-emphasis. A high level on B5 enables de-
emphasis (frequency controlled by B3 and B4), and a low
level on B5 disables de-emphasis.
SOFT MUTE
Soft mute is enabled when B6 is high. The soft mute occurs
gradually, unlike the forced infinite zero detection. When
the mute data bit is high, complete muting will occur in
127/fs seconds. For f
S
= 44.1kHz, complete mute will occur
in 2.88ms.
DOUBLE-SPEED DUBBING
Double-speed dubbing is used when the application allows
for the CD to be copied at twice the normal playback rate.
Double-speed dubbing is enabled when B7 is high. This
mode can only operate when the system clock is set at 384fs.
Double-speed dubbing can only occur when the sample rate
is 44.1kHz. Since f
S
is set at 44.1kHz, the system clock in
double-speed mode is at 192fs.
MODE 2 CONTROLS
Mode 2 is enabled when B0 is high, B1 is low, and B2 is
high. This mode controls infinite zero detection, input reso-
lution, LRCI polarity and input format.
INFINITE ZERO DETECTION
B4 is used to enable or disable infinite zero detection.
PCM1710 monitors both data input (DIN) and bit clock
(BCKIN). When the data input is continuously zero or one
for 65,536 cycles of the bit clock, infinite zero detection
occurs, which forces the output of the PCM1710 to one-half
of V
CC
(typically 2.5V). Once this happens, only the output
amplifier is connected. This is done to avoid having the
noise shaped output spectrum of the DAC appear at the
output of the PCM1710. This function is especially useful
for CD applications when the player is between tracks. An
inherent attribute of all delta-sigma architectures is the
presence of quantization noise when the input is constant (all
1s or 0s). When the zero detect circuit disconnects the DAC
from the output amplifier, a very low level “click” noise may
be audible. The click noise occurs at approximately –76dB,
and in many cases is inaudible.
INPUT RESOLUTION
PCM1710 is capable of accepting either 16-bit or 20-bit
input data. Specifications for PCM1710 are tested and guar-
anteed using 16-bit data. When 20 bits are used, dynamic
performance is improved by approximately 2dB. Refer to
“Typical Performance Curves” for a comparison of 16-bit
and 20-bit data. A low on B5 places PCM1710 in 16-bit
mode, and a high on B5 sets PCM1710 to 20-bit mode.
SAMPLE RATE CLOCK POLARITY
B6 controls the polarity of the sample rate clock (LRCIN)
polarity. When B6 is low, data will be accepted on the left
channel when LRCIN is high, and on the right channel when
LRCIN is low. When B6 is high, data will be accepted on the
right channel when LRCIN is high, and on the left channel
when LRCIN is low.
INPUT FORMAT
Normal input mode for PCM1710 is MSB first, right justi-
fied. PCM1710 may also be operated with IIS (32 continu-
ous clock cycles per word) input format. When B7 is low,
the input format is “normal”. When B7 is high, the input
format is “IIS”. However, PCM1710 can only accept IIS
input format when it is in 16-bit mode. 20-bit data must be
entered in normal mode.
DEFAULT MODE
At initial power-on, default settings for PCM1710 are 44.1kHz
f
S
, de-emphasis off, mute off, double-speed off, infinite zero
detect on, 16-bit input LRCIN left channel high, and normal
input mode.
SYSTEM CLOCK
SAMPLING FREQUENCY
SYSTEM CLOCK FREQUENCY
32kHz
32kHz
44.1kHz
44.1kHz
48kHz
48kHz
256fs
384fs
256fs
384fs
256fs
384fs
8.1920MHz
12.2880MHz
11.2896MHz
16.9344MHz
12.2880MHz
18.4320MHz
TABLE VIII. Relationship of fs and System Clock.
NORMAL/DOUBLE-SPEED DUBBING
For most CD playback applications operating at 384fs, the
system clock frequency must be 16.9344MHz, in both the
normal mode and double-speed dubbing mode. Table VIII
illustrates the relationship between fs and output clock
frequency in both modes.
ML/DSD (PIN 28)
PARAMETER
H
L
(Normal)
(Double Speed)
XTI Input Clock Frequency
XTI Frequency
384fs
192fs
16.9344MHz
(f
S
= 44.1kHz)
384fs
16.9344MHz
(f
S
= 88.2kHz)
192fs
CLKO Output Clock Frequency
TABLE IX. Relationship Between Normal/Double Speed
and fs.
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