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參數(shù)資料
| 型號： | PCM1604 |
| 英文描述： | 24-Bit, 192kHz Sampling,6-Channel, Enhanced Multi-Level, Delta-Sigma DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 24位192kHz采樣,6 -通道，增強的多級，Δ-Σ數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 30/32頁 |
| 文件大?。?/td> | 263K |
| 代理商： | PCM1604 |
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PCM1604, PCM1605
FIGURE 19. Eight-Level Delta-Sigma Modulator.
THEORY OF OPERATION
The D/A converter section of the PCM1604 is based upon a
multi-bit delta-sigma architecture. This architecture utilizes
an 4
th
-order noise shaper and an 8-level quantizer, followed by
an analog low-pass filter. A block diagram of the delta-sigma
modulator is shown in Figure 19. This architecture has the
advantage of stability and improved jitter tolerance when
compared to traditional 1-bit (2-level) delta-sigma designs.
The combined oversampling rate of the digital interpolation
filter and the delta-sigma modulator is 32fs, 64fs, or 128fs.
The total oversampling rate is determined by the desired
sampling frequency. If fs
≤
96kHz, then the OVER bit in
Register 12 may be set to an oversampling rate to 64fs or
128fs. If fs > 96kHz, then the OVER bit may be used to set the
oversampling rate to 32fs or 64fs. Figure 20 shows the out-
of- band quantization noise plots for both the 64x and 128x
oversampling scenarios. Notice that the 128x oversampling
plot shows significantly improved out-of-band noise perfor-
mance, allowing for a simplified low-pass filter to be used at
the output of the DAC.
+
Z
–1
8-Level Quantizer
+
Z
–1
+
Z
–1
–
+
Z
–1
+
+
4f
S
or 8f
S
32f
S
, 64f
S
, or 128f
S
0
100
200
300
400
500
600
125
120
115
110
105
100
95
90
85
80
D
Jitter (ps)
CLOCK JITTER
FIGURE 21. Jitter Sensitivity.
FIGURE 20. Quantization Noise Spectrum.
0
1
2
3
4
5
6
7
8
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
Frequency (f
S
)
QUANTIZATION NOISE SPECTRUM
(64x Oversampling)
QUANTIZATION NOISE SPECTRUM
(128x Oversampling)
0
1
2
3
4
5
6
7
8
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
Frequency (f
S
)
Figure 21 illustrates the simulated jitter sensitivity of the
PCM1604. To achieve best performance, the system clock
jitter should be less than 300 picoseconds. This is easily
achieved using a quality clock generation IC, like Burr-
Brown’s PLL1700.
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| PCM1604PT | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| PCM1604PTG4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| PCM1604PTR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1604PTRG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| PCM1604Y | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24Bit/192kHz Smplg 6Ch Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
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