參數(shù)資料
型號: PCK2510S
廠商: NXP Semiconductors N.V.
英文描述: 50-150 MHz 1:10 SDRAM clock driver
中文描述: 50-150兆赫1:10 SDRAM時鐘驅動器
文件頁數(shù): 6/10頁
文件大?。?/td> 81K
代理商: PCK2510S
Philips Semiconductors
Product specification
PCK2510S
50–150 MHz 1:10 SDRAM clock driver
1999 Dec 13
6
SWITCHING CHARACTERISTICS
Over recommended ranges of supply voltage and operating free-air temperature; C
L
= 30 pF
1
PARAMETER
FROM
TO
V
CC
, AV
CC
= 3.3 V
±
0.3 V
MIN
TYP
–100
UNIT
(INPUT)/CONDITION
(OUTPUT)
MAX
100
t
phase error 2
CLKIN
= 100 MHz to 133 MHz
CLKIN
= 66 MHz
CLKIN
= 100 MHz to 133 MHz
Any Y or FBOUT
FBIN
FBIN
FBIN
ps
–125
125
ps
t
phase error
– jitter
3
t
SK(0)
jitter
(peak-peak)
jitter
(cycle-cycle)
Duty cycle reference
–50
50
ps
Any Y or FBOUT
200
ps
CLKIN = 100 MHz to 133 MHz
Any Y or FBOUT
–80
80
ps
|65|
F(CLKIN
>
60 MHz)
V
O
= 0.4 V to 2 V
V
O
= 0.4 V to 2 V
Any Y or FBOUT
47
53
%
t
r
t
f
Any Y or FBOUT
2.5
1
V/ns
Any Y or FBOUT
2.5
1
V/ns
NOTES:
1. These parameters are not production tested.
2. This is considered as static phase error.
3. Phase error does not include jitter. (t
phase error
= static phase error – jitter
(cycle-cycle)
)
4. The t
SK(0)
specification is only valid for equal loading of all outputs.
PARAMETER MEASUREMENT INFORMATION
SW00384
3V
0V
V
OH
V
OL
OUTPUT
INPUT
50% V
CC
50% V
CC
t
f
t
r
2V
0.4V
2V
0.4V
FROM OUTPUT
UNDER TEST
30pF
500
LOAD CIRCUIT FOR OUTPUTS
VOLTAGE WAVEFORMS & PHASE ERROR TIMES
NOTES:
1. C
L
includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR
100MHz, Z
O
= 50
, t
r
1.2ns, t
f
1.2ns.
3. The outputs are measured one at a time with one transition per measurement.
t
pe
Figure 1. Load Circuit and Voltage Waveforms
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