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參數(shù)資料
| 型號(hào)： | PCK2022RDGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | CK00 100/133 MHz spread spectrum differential system clock generator |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, SOT-362-1, TSSOP-48 |
| 文件頁數(shù)： | 3/14頁 |
| 文件大?。?/td> | 102K |
| 代理商： | PCK2022RDGG |
Philips Semiconductors
Product specification
PCK2022R
CK00 (100/133 MHz) spread spectrum differential
system clock generator
2000 Nov 13
3
PIN DESCRIPTION
PIN(S)
SYMBOL
FUNCTION
1
IOCLK
Dual frequency pin which can operate at either 33 MHz or 66 MHz per the selection table.
3, 4
48M_0/SELA
48M_1/SELB
HCLK0
HCLKB0
HCLK1
HCLKB1
HCLK2
HCLKB2
HCLK3
HCLKB3
HCLK4
HCLKB4
HCLK5
HCLKB5
HCLK6
HCLKB6
HCLK7
HCLKB7
REFCLK/SELC
3.3 V fixed 48 MHz clock outputs. During power-up pins function as latched inputs that enable SELA and
SELB prior to the pins being used for output of 3 V at 48 MHz. Part must be clocked to latch data in.
Host output pair 0
7, 8
10, 11
Host output pair 1
13, 14
Host output pair 2
16, 17
Host output pair 3
42, 21
Host output pair 4
39, 38
Host output pair 5
36, 35
Host output pair 6
33, 32
Host output pair 7
19
3.3 V fixed 14.318 MHz output. During power-up, pin functions as a latched input that enables SELC prior
to the pin being used for the clock output. Part must be clocked to latch data in.
Enables spread spectrum mode when held LOW on differential host outputs and 33 MHz IOCLK clocks.
Asserts LOW.
Crystal input
20
SPREAD
21
XIN
22
XOUT
Crystal output
26
I
REF
This pin controls the reference current for the host pairs. This pin requires a fixed precision resistor tied to
ground in order to establish the correct current.
Select input pin used to control the scaling of the HCLK and HCLKB output current.
29, 30
MULTSEL0
MULTSEL1
PWRDWN
44
Device enters power-down mode when held LOW. Asserts LOW.
48
SEL100/133
Select input pin for enabling 133 MHz or 100 MHz CPU outputs
2, 6, 12,
18, 24, 31,
37, 43
V
DD3
3.3 V power supply
5, 9, 15,
21, 28, 34,
40, 47
GND
Ground
25, 46
AV
DD
AGND
3.3 V power supply for analog circuits
27, 45
Ground for analog circuits
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相關(guān)代理商/技術(shù)參數(shù) |
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| PCK2023 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK408 66/100/133/200 MHz spread spectrum differential system clock generator |
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| PCK2023DGG,512 | 制造商:NXP Semiconductors 功能描述:PLL Clock Synthesizer Dual Up to 200MHz 56-Pin TSSOP Tube Tube |
| PCK2023DL | 功能描述:鎖相環(huán) - PLL WIT -CHG 112 TO 512 PCK METHOD RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PCK2023DL,512 | 功能描述:鎖相環(huán) - PLL WIT -CHG 112 TO 512 RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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