參數(shù)資料
型號(hào): PCK2010
廠商: NXP Semiconductors N.V.
英文描述: CK98 (100/133MHz) Spread Spectrum System Clock Generator(CK98 (100/133MHz) 擴(kuò)散光譜系統(tǒng)始終發(fā)生器)
中文描述: CK98(100/133MHz)擴(kuò)頻系統(tǒng)時(shí)鐘發(fā)生器(CK98(100/133MHz)擴(kuò)散光譜系統(tǒng)始終發(fā)生器)
文件頁(yè)數(shù): 9/16頁(yè)
文件大?。?/td> 113K
代理商: PCK2010
Philips Semiconductors
Preliminary specification
PCK2010
CK98 (100/133MHz) Spread Spectrum System Clock
Generator
1999 Mar 01
9
AC CHARACTERISTICS
V
DD3V
= 3.3V
±
5%; VDDAPIC = V
DD25V
= 2.5V
±
5%; f
crystal
= 14.31818 MHz
CPU CLOCK OUTPUTS, CPU(0–3) (LUMP CAPACITANCE TEST LOAD = 20pF)
SYMBOL
PARAMETER
LIMITS
T
amb
= 0
°
C to +70
°
C
133MHz MODE
MIN
7.5
1.87
1.67
0.4
0.4
LIMITS
T
amb
= 0
°
C to +70
°
C
100MHz MODE
MIN
10.0
3.0
2.8
0.4
0.4
UNIT
NOTES
MAX
8.0
n/a
n/a
1.6
1.6
250
55
175
MAX
10.5
n/a
n/a
1.6
1.6
250
55
175
T
HKP
T
HKH
T
HKL
T
HRISE
T
HFALL
T
JITTER
DUTY CYCLE
T
HSKW
CPUCLK period
CPUCLK HIGH time
CPUCLK LOW time
CPUCLK rise time
CPUCLK fall time
CPUCLK cycle-cycle jitter
Output Duty Cycle
CPUCLK pin-pin skew
ns
ns
ns
ns
ns
ps
%
ps
2, 9
5, 10
6, 10
8
8
45
45
1
2
CPUDIV2 CLOCK OUTPUTS, CPUDIV2 (0–1) (LUMP CAPACITANCE TEST LOAD = 20pF)
SYMBOL
PARAMETER
LIMITS
T
amb
= 0
°
C to +70
°
C
133MHz MODE
MIN
15.0
5.25
5.05
0.4
0.4
LIMITS
T
amb
= 0
°
C to +70
°
C
100MHz MODE
MIN
20.0
7.5
7.3
0.4
0.4
UNIT
NOTES
MAX
16.0
n/a
n/a
1.6
1.6
250
55
175
MAX
21.0
n/a
n/a
1.6
1.6
250
55
175
T
HKP
T
HKH
T
HKL
T
HRISE
T
HFALL
T
JITTER
DUTY CYCLE
T
HSKW
CPUDIV2 CLK period
CPUDIV2 CLK HIGH time
CPUDIV2 CLK LOW time
CPUDIV2 CLK rise time
CPUDIV2 CLK fall time
CPUDIV2 CLK cycle-cycle jitter
CPUDIV2 CLK Duty Cycle
CPUDIV2 CLK pin-pin skew
ns
ns
ns
ns
ns
ps
%
ps
2, 9
5, 10
6, 10
8
8
45
45
1
2
PCI CLOCK OUTPUTS, PCI(0–7) (LUMP CAPACITANCE TEST LOAD = 30pF)
SYMBOL
PARAMETER
LIMITS
T
amb
= 0
°
C to +70
°
C
133MHz MODE
MIN
30.0
12.0
12.0
0.5
0.5
LIMITS
T
amb
= 0
°
C to +70
°
C
100MHz MODE
MIN
30.0
12.0
12.0
0.5
0.5
UNIT
NOTES
MAX
n/a
n/a
n/a
2.0
2.0
500
55
500
MAX
n/a
n/a
n/a
2.0
2.0
500
55
500
T
HKP
T
HKH
T
HKL
T
HRISE
T
HFALL
T
JITTER
DUTY CYCLE
T
HSKW
PCICLK period
PCICLK HIGH time
PCICLK LOW time
PCICLK rise time
PCICLK fall time
PCICLK cycle-cycle jitter
PCICLK Duty Cycle
PCICLK pin-pin skew
ns
ns
ns
ns
ns
ps
%
ps
2, 9
5, 10
6, 10
8
8
45
45
1
2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCK2010DL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK98 100/133MHz Spread Spectrum System Clock Generator
PCK2010R 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK98R 100/133MHz RCC spread spectrum system clock generator
PCK2010RA 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK98R 100/133MHz RCC spread spectrum system clock generator
PCK2010RADL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK98R 100/133MHz RCC spread spectrum system clock generator
PCK2010RADL,112 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 CK98R(100/133MHZ)RCC/CLK GEN RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56