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參數(shù)資料
| 型號： | PCK2000DL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | CK97 66/100MHz System Clock Generator |
| 中文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 7.50 MM, PLASTIC, SSOP-48 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 90K |
| 代理商： | PCK2000DL |
Philips Semiconductors
Product specification
PCK2000
CK97 (66/100MHz) System Clock Generator
1998 Sep 29
10
AC WAVEFORMS
V
M
= 1.25V @ V
DDQ2
and 1.5V @ V
DDQ3
V
X
= V
OL
+ 0.3V
V
Y
= V
OH
–0.3V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
CPUCLK
1.25V
SW00240
1.25V
CPUCLK
V
DDQ2
V
SS
V
DDQ2
V
SS
T
HSKW
Figure 1. CPUCLK to CPUCLK skew
CPUCLK
1.5V
1.25V
PCICLK
V
DDQ2
V
SS
V
DDQ3
V
SS
T
HPOFFSET
SW00241
Figure 2. CPUCLK to PCICLK offset
SW00242
T
DUTY CYCLE
T
HKH
T
RISE
T
FALL
T
HKL
T
PKP
T
PKH
T
RISE
T
FALL
T
PKL
2.5V CLOCKING
INTERFACE
3.3V CLOCKING
INTERFACE
(TTL)
2.0
1.25
0.4
2.4
1.5
0.4
Figure 3. 2.5V/3.3V Clock waveforms
t
PLZ
t
PZL
V
I
SEL 100, 66,
SEL1, SEL0
GND
V
DD
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
V
SS
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SW00239
Figure 4. 3-State enable and disable times.
V
DDQ2
V
IH
= 1.7V
1.25V
V
IL
= 0.7V
2.5VOLT MEASURE POINTS
V
OH
= 2.0V
V
OL
= 0.4V
V
SS
SYSTEM
MEASUREMENT
POINTS
V
DDQ3
V
IH
= 2.0V
1.5V
V
IL
= 0.7V
3.3VOLT MEASURE POINTS
V
OH
= 2.4V
V
OL
= 0.4V
V
SS
COMPONENT
MEASUREMENT
POINTS
SYSTEM
MEASUREMENT
POINTS
SW00243
COMPONENT
MEASUREMENT
POINTS
Figure 5. Component versus system measure points
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PCK2000DL-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
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| PCK2000MDB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
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