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| 型號： | PCICLOCKGEN_R001 |
| 英文描述： | AMD Alchemy? Solutions Au1500? PCI Clock Generation? |
| 中文描述： | 采用AMD Alchemy？解決方案Au1500？ PCI時(shí)鐘產(chǎn)生？ |
| 文件頁數(shù)： | 4/4頁 |
| 文件大?。?/td> | 25K |
| 代理商： | PCICLOCKGEN_R001 |
4
Application Note
Rev. 001
April 2002
PCI Clock Generation on the Au1500 Processor
A frequency generator should be chosen for the PCI clock. For this example frequency generator 2 is
used.
The clock source for PCI is set to frequency generator 2 by writing the value 4 to the MPC field (bits
19:17) of the
sys_clksrc
register at 0xB1900028. The DPC (bit 16) and CPC (bit 15) bits should be
cleared to so that the PCI clock is not further divided.
Frequency generator 2 is set to divide by 6 setting the FRDIV2 field of the
sys_freqctrl0
register at
0xB1900020 to 2. The FE2 field should be set to 1 to enable output from frequency generator 2, and
the FS2 field should be set to 1 to select the AUX PLL as the clock source.
This setup results in a 64-MHz PCI clock on the PCICLKO pin.
References:
[1] The Au1500 Processor Data Book.
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