參數(shù)資料
型號: PCI-WDT
英文描述: UEBERWACHUNGSKARTE PLUG AND PLAY
中文描述: UEBERWACHUNGSKARTE即插即用
文件頁數(shù): 15/31頁
文件大?。?/td> 334K
代理商: PCI-WDT
Chapter 3
Programming Details
Page 5
Blue Chip Technology Ltd.
01270202.doc
Page 5
CHAPTER 3
PROGRAMMING DETAILS
This chapter provides details of the cards internal registers.
Address Map
The address map for the PCI-WD occupies a 12-byte block of addresses.
All the following addresses are relative to the addresses contained in PCI Base
Address Registers 2, (BAR2 ) as indicated. The BAR2 is located at address
offset 18h in the PCI configuration space:-
ADDRESS
(hex)
Base2 + 5
Base2 + 6
Base2 + 8
Base2 + 8
Base2 + 9
Base2 + 9
Base2 + a
Base2 + b
FUNCTION
ACCESS
WIDTH
byte
byte
byte
byte
byte
byte
byte
byte
READ/
WRITE
W
R/W
W
R
W
R
W
W
LM78 Internal Address Register
LM78 Internal Data Register
Watchdog Timer Count Load Register
Watchdog Timer Reset port
PCI-WD IRQ and WD timer Enable/Disable Register
PCI-WD Status Register
PCI WD Output Mask Register
PCI-WD Output Control Register
In order to access the internal registers of the LM78, the user must first write
the address of the register to port Base2 + 5h. The data is then written to or
read from port Base2 + 6h. A full description of the LM78 registers is given in
the appendices.
The Base2 + 8+ registers have the following bit assignments.
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