
2004 Mar 05
28
Philips Semiconductors
Product specification
(67 + 1)
×
102 pixels matrix LCD driver
PCF8813
11 INSTRUCTIONS
ThePCF8813interfacesviathe8-bitparallelinterface,two
different 3-line serial interfaces, 4-wire serial interface or
an I
2
C-bus interface. Processing of the instructions does
not require the display clock.
In the case of the parallel and 4-wire serial interface, data
accesses to the PCF8813 can be divided into two areas;
those that define the operating mode of the device, and
those that fill the display RAM; the distinction being the
D/C input. When the D/C input is set to logic 0, the chip will
respond to instructions as defined in Table 5. When the
D/C bit is at logic 1, the chip will send data into the RAM.
When the 3-wire serial interface or the I
2
C-bus interface is
used, the distinction between instructions that define the
operating mode of the device and those that fill the display
RAM is made respectively by the display data length
instruction (4-line SPI) or by D/C bit in the data stream
(3-line serial interface and I
2
C-bus interface).
There are four types of instructions:
Defining PCF8813 functions such as display
configuration, etc.
Setting internal RAM addresses
Performing data transfer with internal RAM
Other instructions.
In normal use, category 3 instructions are used most
frequently. To lessen the MPU program load, automatic
incrementing by one of the internal RAM address pointers
after each data write is implemented.
Table 5
Instructions not expressly defined in this table and reserved instructions are not allowed in PCF8813 applications.
Instruction set
INSTRUCTION
D/C
R/W
COMMAND BYTE
DESCRIPTION
DB7
(MSB)
DB6
DB5
DB4
DB3
DB2
DB1
DB0
(LSB)
H = 0 or 1
NOP
Function set
0
0
0
0
0
0
0
0
0
1
0
0
0
0
V
0
H
no operation
Power-down
control; entry
mode
read status byte
for serial and
I
2
C-bus interfaces
reads parallel
interface status
byte
writes data to
RAM
MX
MY
PD
Read status byte
0
1
0
0
0
1
1
0
δ
(1)
δ
(1)
Read status byte
0
1
BUSY
DON
RES
MF2
MF1
MF0
DS1
DS0
Write data
1
0
D7
D6
D5
D4
D3
D2
D1
D0
H = 0
Reserved
Display control
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
D
X
0
X
E
do not use
sets display
configuration
V
LCD
programming
range
switch HVgen
on/off
double command
byte: set data
order; top/bottom
row swap mode
Set lower/higher
program range
Set power control
HVgen on/off
Display configuration
0
0
0
0
0
1
0
0
0
PRS
0
0
0
0
0
1
0
0
1
PC
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
0
δ
(1)
BRS
D0